Manuel Arguelles b64d99091b arm: mpu: dsb after writing to SCTLR on MPU disable ... Execute data and instruction sync barriers after writing to SCTLR to disable the MPU, to ensure the registers are set before proceeding and that the new changes are seen by the instructions that follow. Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>		2022-07-26 11:09:42 +00:00
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core	arm: mpu: dsb after writing to SCTLR on MPU disable	2022-07-26 11:09:42 +00:00
include	arch: comply to coding guidelines MISRA C:2012 Rule 14.4	2022-07-20 09:28:38 -05:00
CMakeLists.txt	…
Kconfig	arch: arm: Add unified floating-point configuration symbols	2022-05-05 12:03:27 +09:00