56 lines
1.7 KiB
C
56 lines
1.7 KiB
C
/*
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* Copyright (c) 2019 Intel Corp.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _X86_OFFSETS_INC_
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#define _X86_OFFSETS_INC_
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GEN_OFFSET_SYM(_callee_saved_t, rsp);
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GEN_OFFSET_SYM(_callee_saved_t, rbp);
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GEN_OFFSET_SYM(_callee_saved_t, rbx);
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GEN_OFFSET_SYM(_callee_saved_t, r12);
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GEN_OFFSET_SYM(_callee_saved_t, r13);
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GEN_OFFSET_SYM(_callee_saved_t, r14);
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GEN_OFFSET_SYM(_callee_saved_t, r15);
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GEN_OFFSET_SYM(_callee_saved_t, rip);
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GEN_OFFSET_SYM(_callee_saved_t, rflags);
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GEN_OFFSET_SYM(_thread_arch_t, rax);
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GEN_OFFSET_SYM(_thread_arch_t, rcx);
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GEN_OFFSET_SYM(_thread_arch_t, rdx);
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GEN_OFFSET_SYM(_thread_arch_t, rsi);
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GEN_OFFSET_SYM(_thread_arch_t, rdi);
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GEN_OFFSET_SYM(_thread_arch_t, r8);
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GEN_OFFSET_SYM(_thread_arch_t, r9);
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GEN_OFFSET_SYM(_thread_arch_t, r10);
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GEN_OFFSET_SYM(_thread_arch_t, r11);
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GEN_OFFSET_SYM(_thread_arch_t, sse);
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#ifdef CONFIG_USERSPACE
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GEN_OFFSET_SYM(_thread_arch_t, ss);
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GEN_OFFSET_SYM(_thread_arch_t, cs);
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GEN_OFFSET_SYM(_thread_arch_t, psp);
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#ifndef CONFIG_X86_COMMON_PAGE_TABLE
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GEN_OFFSET_SYM(_thread_arch_t, ptables);
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#endif
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#endif /* CONFIG_USERSPACE */
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GEN_OFFSET_SYM(x86_tss64_t, ist1);
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GEN_OFFSET_SYM(x86_tss64_t, ist2);
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GEN_OFFSET_SYM(x86_tss64_t, ist6);
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GEN_OFFSET_SYM(x86_tss64_t, ist7);
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GEN_OFFSET_SYM(x86_tss64_t, cpu);
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#ifdef CONFIG_USERSPACE
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GEN_OFFSET_SYM(x86_tss64_t, psp);
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GEN_OFFSET_SYM(x86_tss64_t, usp);
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#endif /* CONFIG_USERSPACE */
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GEN_ABSOLUTE_SYM(__X86_TSS64_SIZEOF, sizeof(x86_tss64_t));
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GEN_OFFSET_SYM(x86_cpuboot_t, tr);
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GEN_OFFSET_SYM(x86_cpuboot_t, gs_base);
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GEN_OFFSET_SYM(x86_cpuboot_t, sp);
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GEN_OFFSET_SYM(x86_cpuboot_t, stack_size);
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GEN_ABSOLUTE_SYM(__X86_CPUBOOT_SIZEOF, sizeof(x86_cpuboot_t));
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#endif /* _X86_OFFSETS_INC_ */
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