zephyr/arch
Marek Vedral 93a4287115 arm: debug: Add GDB stub for aarch32
This commit adds implementation of GDB stub for 32-bit ARM. It has been
tested only on the Zynq-7000 SoC and I would like to get any feedback
from others.

The stub still has these issues:

- To implement single stepping, it uses instruction address mismatch
  breakpoint, as recommended in ARMv7 reference. The breakpoint control
  register is configured (the state control fields) for the "PL0,
  Supervisor and System modes only" option. Otherwise the breakpoint
  would also halt the processor in abort mode, in which the stub loop
  runs. Zephyr kernel runs in the system mode. This works well until the
  kernel enables interrupts, as interrupt handlers typically run in
  Supervisor mode. Single stepping therefore sometimes "catches" a
  handler instead of the next application instruction. I have not tried
  User mode, because Cortex-A SoCs do not appear to have the
  ARCH_HAS_USERSPACE flag.

Cc: Michal Sojka <michal.sojka@cvut.cz>
Signed-off-by: Marek Vedral <marek.vedral@gmail.com>
2023-12-18 09:31:42 +01:00
..
arc arch: make CONFIG_EXCEPTION_DEBUG cross arch config 2023-12-14 09:32:27 +01:00
arm arm: debug: Add GDB stub for aarch32 2023-12-18 09:31:42 +01:00
arm64 arch: make CONFIG_EXCEPTION_DEBUG cross arch config 2023-12-14 09:32:27 +01:00
common arch: common: multilevel irq: verify interrupt level bits configuration 2023-12-08 08:40:41 -05:00
mips arch: mips: use LOG_ERR to print exceptions 2023-12-14 09:32:27 +01:00
nios2 arch: guard more code with CONFIG_EXCEPTION_DEBUG 2023-12-14 09:32:27 +01:00
posix
riscv arch: guard more code with CONFIG_EXCEPTION_DEBUG 2023-12-14 09:32:27 +01:00
sparc arch: guard more code with CONFIG_EXCEPTION_DEBUG 2023-12-14 09:32:27 +01:00
x86 arch: make CONFIG_EXCEPTION_DEBUG cross arch config 2023-12-14 09:32:27 +01:00
xtensa llext: merge llext_mem and llext_section enums 2023-12-14 19:06:55 +00:00
CMakeLists.txt
Kconfig arch: make CONFIG_EXCEPTION_DEBUG cross arch config 2023-12-14 09:32:27 +01:00