zephyr/arch/x86/core
Tomasz Bursztyka b1cc7312cf arch/x86: Fixing dcache enable/disable code
It did not build in x86_64 due to the fact that cr0 is a 64bits
register in such architecture, instead of being a 32bits one originaly
so the place holder has to follow that size. Such place holder must be
initialized to 0 to make sure no upper 32 bits ends up set which would
conclude in a general protection error.

Operand size specifier (l, q ...) is useless as well in this context.

Clearing up the masks by using proper macros.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2023-12-12 19:11:13 +01:00
..
ia32 arch: x86: z_x86_prep_c -> z_prep_c 2023-12-11 18:23:52 -05:00
intel64 arch: x86: z_x86_prep_c -> z_prep_c 2023-12-11 18:23:52 -05:00
offsets
CMakeLists.txt arch: x86: update with new acpica lib interface 2023-09-07 09:42:38 +02:00
Kconfig.ia32
Kconfig.intel64
cache.c arch/x86: Fixing dcache enable/disable code 2023-12-12 19:11:13 +01:00
common.S arch: x86: z_x86_prep_c -> z_prep_c 2023-12-11 18:23:52 -05:00
cpuhalt.c
cpuid.c
early_serial.c arch/x86: Fix building early console driver 2023-12-01 10:54:59 +00:00
efi.c kernel: mm: move kernel mm functions under kernel includes 2023-11-20 09:19:14 +01:00
fatal.c
ia32.cmake
intel64.cmake
legacy_bios.c arch: x86: update with new acpica lib interface 2023-09-07 09:42:38 +02:00
memmap.c
multiboot.c
pcie.c arch: x86: pcie: Remove old include 2023-12-06 09:17:08 +00:00
prep_c.c arch: x86: z_x86_prep_c -> z_prep_c 2023-12-11 18:23:52 -05:00
reboot_rst_cnt.c
spec_ctrl.c
tls.c
userspace.c kernel: mm: only include demand_paging.h if needed 2023-11-23 10:01:45 +01:00
x86_mmu.c kernel: mm: move kernel mm functions under kernel includes 2023-11-20 09:19:14 +01:00