zephyr/soc/riscv/openisa_rv32m1
David Leach bcd77a572c soc: riscv: rv32m1: kconfig: use RV32M1 TRNG as an entropy generator
If the user requires an entropy generator to be activated, enable
the SoC TRNG as a source for the entropy.

Signed-off-by: David Leach <david.leach@nxp.com>
2019-11-08 15:38:57 +01:00
..
CMakeLists.txt
Kconfig kconfig: Clean up header comments and make them consistent 2019-11-04 17:31:27 -05:00
Kconfig.defconfig soc: riscv: rv32m1: kconfig: use RV32M1 TRNG as an entropy generator 2019-11-08 15:38:57 +01:00
Kconfig.soc kconfig: Clean up header comments and make them consistent 2019-11-04 17:31:27 -05:00
dts_fixup.h
linker.ld linker: move where we define _LINKER and _ASMLANGUAGE 2019-11-03 12:55:16 +01:00
soc.c kernel: rename z_arch_ to arch_ 2019-11-07 15:21:46 -08:00
soc.h
soc_context.h
soc_irq.S
soc_offsets.h
soc_ri5cy.h
soc_zero_riscy.h
vector.S
wdog.S