zephyr/samples/boards/mec15xxevb_assy6853
Daniel Leung 2e7831562a samples: mec15xxevb_assy6853/pm: shorten wait after deep sleep
The origin for sleeping for 3ms after coming out of deep sleep
was to wait for PLL to lock so that UART would not send
garbage characters due to incorrect clock. In the deep sleep
code, it spins to wait for the PLL to lock so there is no need
to wait for 3ms in the app. So shorten it like other busy wait.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-04-10 07:48:33 -04:00
..
power_management samples: mec15xxevb_assy6853/pm: shorten wait after deep sleep 2020-04-10 07:48:33 -04:00
mec15xxevb_assy6853.rst