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samples: mec15xxevb_assy6853/pm: shorten wait after deep sleep 

The origin for sleeping for 3ms after coming out of deep sleep
was to wait for PLL to lock so that UART would not send
garbage characters due to incorrect clock. In the deep sleep
code, it spins to wait for the PLL to lock so there is no need
to wait for 3ms in the app. So shorten it like other busy wait.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2020-04-09 17:39:10 -07:00 committed by Anas Nashif
parent fd1d93e552
commit 2e7831562a
1 changed files with 2 additions and 2 deletions
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4
samples/boards/mec15xxevb_assy6853/power_management/src/power_mgmt.c
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@ -187,7 +187,7 @@ int test_pwr_mgmt_multithread(bool use_logging, u8_t cycles)
k_msleep(CONFIG_SYS_PM_MIN_RESIDENCY_DEEP_SLEEP_1 + 500);
k_busy_wait(3000);
k_busy_wait(100);
if (use_logging) {
LOG_INF("Wake from Deep Sleep\n");
@ -233,7 +233,7 @@ int test_pwr_mgmt_singlethread(bool use_logging, u8_t cycles)
k_msleep(CONFIG_SYS_PM_MIN_RESIDENCY_DEEP_SLEEP_1 + 1000);
k_busy_wait(3000);
k_busy_wait(100);
if (use_logging) {
LOG_INF("Wake from Deep Sleep\n");