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soc: andestech: ae350: support 2 PLIC instances (PLIC, PLIC-SW) 

Andes AE350 integrates 2 PLICs in the platfrom, one for external interrupt
and another for IPI. Adusted Kconfig for total IRQ numbers and support 2
aggregators in the 2nd level interrupt controller.

Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>
This commit is contained in:
Jimmy Zheng 2024-10-07 13:57:01 +08:00 committed by Carles Cufí
parent 6d6c87b9fe
commit f4fe84e112
1 changed files with 7 additions and 1 deletions
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8
soc/andestech/ae350/Kconfig.defconfig
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@ -30,11 +30,17 @@ config 2ND_LVL_ISR_TBL_OFFSET
config 2ND_LVL_INTR_00_OFFSET config 2ND_LVL_INTR_00_OFFSET
default 11 default 11
config 2ND_LVL_INTR_01_OFFSET
default 3
config MAX_IRQ_PER_AGGREGATOR config MAX_IRQ_PER_AGGREGATOR
default 52 default 52
config NUM_2ND_LEVEL_AGGREGATORS
default 2
config NUM_IRQS config NUM_IRQS
default 64 default 116
choice CACHE_TYPE choice CACHE_TYPE
default EXTERNAL_CACHE default EXTERNAL_CACHE