From f4fe84e112b7a3a584eb1ab6c66d462f17e6c967 Mon Sep 17 00:00:00 2001 From: Jimmy Zheng Date: Mon, 7 Oct 2024 13:57:01 +0800 Subject: [PATCH] soc: andestech: ae350: support 2 PLIC instances (PLIC, PLIC-SW) Andes AE350 integrates 2 PLICs in the platfrom, one for external interrupt and another for IPI. Adusted Kconfig for total IRQ numbers and support 2 aggregators in the 2nd level interrupt controller. Signed-off-by: Jimmy Zheng --- soc/andestech/ae350/Kconfig.defconfig | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/soc/andestech/ae350/Kconfig.defconfig b/soc/andestech/ae350/Kconfig.defconfig index b760c38d64d..49d6af78c91 100644 --- a/soc/andestech/ae350/Kconfig.defconfig +++ b/soc/andestech/ae350/Kconfig.defconfig @@ -30,11 +30,17 @@ config 2ND_LVL_ISR_TBL_OFFSET config 2ND_LVL_INTR_00_OFFSET default 11 +config 2ND_LVL_INTR_01_OFFSET + default 3 + config MAX_IRQ_PER_AGGREGATOR default 52 +config NUM_2ND_LEVEL_AGGREGATORS + default 2 + config NUM_IRQS - default 64 + default 116 choice CACHE_TYPE default EXTERNAL_CACHE