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boards: qemu_riscv32: add pinctrl configuration for qemu_riscv32_xip 

Add pinctrl configuration for future use with the new pinctrl driver.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
This commit is contained in:
Filip Kokosinski 2022-03-22 09:21:59 +01:00 committed by Carles Cufí
parent 99e787de21
commit a9543e0ff4
1 changed files with 17 additions and 0 deletions
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boards/riscv/qemu_riscv32/qemu_riscv32_xip-pinctrl.dtsi Normal file
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@ -0,0 +1,17 @@
/*
* Copyright (c) 2022 Antmicro <www.antmicro.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <dt-bindings/pinctrl/sifive-pinctrl.h>
&pinctrl {
/* UART0 */
uart0_rx_default: uart0_rx_default {
pinmux = <16 SIFIVE_PINMUX_IOF0>;
};
uart0_tx_default: uart0_tx_default {
pinmux = <17 SIFIVE_PINMUX_IOF0>;
};
};