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zephyr/soc/arm/nxp_lpc/lpc54xxx/soc.h

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lpc: Add nxp_lpc soc family to soc directory Add soc configuration support for lpc soc family, Kconfigs and soc files for lpcxxx soc. Add dtsi file for lpc54xxx. Signed-off-by: Shiksha Patel <shiksha.patel@nxp.com> Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-07-26 17:40:18 +08:00
/*
* Copyright (c) 2017, NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Board configuration macros for the nxp_lpc54114 platform
*
* This header file is used to specify and describe board-level aspects for the
* 'nxp_lpc54114' platform.
*/
#ifndef _SOC__H_
#define _SOC__H_
#ifndef _ASMLANGUAGE
cleanup: include/: move misc/util.h to sys/util.h move misc/util.h to sys/util.h and create a shim for backward-compatibility. No functional changes to the headers. A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES. Related to #16539 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-26 22:33:55 +08:00
#include <sys/util.h>
lpc: Add nxp_lpc soc family to soc directory Add soc configuration support for lpc soc family, Kconfigs and soc files for lpcxxx soc. Add dtsi file for lpc54xxx. Signed-off-by: Shiksha Patel <shiksha.patel@nxp.com> Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-07-26 17:40:18 +08:00
#include <fsl_common.h>
soc: nxp_lpc: Enable mpu on the lpc54114 m4 core Enables the arm v7m mpu on the lpc54114 m4 core. Reuses the mpu configuration from the i.mx rt, which has the same mpu. Tested on hardware with tests/kernel/mem_protect Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-09-13 01:23:03 +08:00
soc: arm: nxp: cleanup in soc.h headers A commit that organizes the soc.h header of NXP SoCs: - removing redundant inclusions of sys/util.h - removing inclusions of device.h and kernel_includes.h - including the auto-generated DTS board header - including the fsl_common.h header - fixing minor style issues Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-09-23 01:24:34 +08:00
/* Add include for DTS generated information */
dts: Rename generated_dts_board*.{h,conf} to devicetree*.{h,conf} generated_dts_board.h is pretty redundant and confusing as a name. Call it devicetree.h instead. dts.h would be another option, but DTS stands for "devicetree source" and is the source code format, so it's a bit confusing too. The replacement was done by grepping for 'generated_dts_board' and 'GENERATED_DTS_BOARD'. Two build diagram and input-output SVG files were updated as well, along with misc. documentation. hal_ti, mcuboot, and ci-tools updates are included too, in the west.yml update. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-16 20:29:53 +08:00
#include <devicetree.h>
soc: arm: nxp: cleanup in soc.h headers A commit that organizes the soc.h header of NXP SoCs: - removing redundant inclusions of sys/util.h - removing inclusions of device.h and kernel_includes.h - including the auto-generated DTS board header - including the fsl_common.h header - fixing minor style issues Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-09-23 01:24:34 +08:00
lpc: Add nxp_lpc soc family to soc directory Add soc configuration support for lpc soc family, Kconfigs and soc files for lpcxxx soc. Add dtsi file for lpc54xxx. Signed-off-by: Shiksha Patel <shiksha.patel@nxp.com> Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-07-26 17:40:18 +08:00
#endif /* !_ASMLANGUAGE */
arch: nxp: lpc54xxx: Rename SoC bits from LPC54114 to LPC54114_M4 Rename various SoC related defines and files from just being LPC54114 to LPC54114_M4. This is in prep for supporting a build for the second core on the LPC54114 (the Cortex-M0+). * Renamed Kconfig SOC_LPC54114 to SOC_LPC54114_M4 * Renamed Kconfig.defconfig.lpc54114 to Kconfig.defconfig.lpc54114_m4 * Introduced nxp_lpc54xxx_m4.dtsi based on nxp_lpc54xxx.dtsi * Moved some pinmux related defines into SoC code. Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-05-16 02:47:24 +08:00
#define IOCON_PIO_DIGITAL_EN 0x80u
#define IOCON_PIO_FUNC0 0x00u
#define IOCON_PIO_FUNC1 0x01u
#define IOCON_PIO_FUNC2 0x02u
boards: lpcxpresso54114: Enable spi instance 5 Enables spi instance 5 on the lpcxpresso54114 board. Configures pinmuxes and clocks, and updates board documentation accordingly. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-07-04 03:49:36 +08:00
#define IOCON_PIO_FUNC3 0x03u
#define IOCON_PIO_FUNC4 0x04u
boards: lpcxpresso54114: Enable i2c instance 4 Enables i2c instance 4 on the lpcxpresso54114 board. Configures pinmuxes and clocks, and updates board documentation accordingly. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-12-09 04:38:02 +08:00
#define IOCON_PIO_I2CDRIVE_LOW 0x00u
#define IOCON_PIO_I2CFILTER_EN 0x00u
#define IOCON_PIO_I2CSLEW_I2C 0x00u
arch: nxp: lpc54xxx: Rename SoC bits from LPC54114 to LPC54114_M4 Rename various SoC related defines and files from just being LPC54114 to LPC54114_M4. This is in prep for supporting a build for the second core on the LPC54114 (the Cortex-M0+). * Renamed Kconfig SOC_LPC54114 to SOC_LPC54114_M4 * Renamed Kconfig.defconfig.lpc54114 to Kconfig.defconfig.lpc54114_m4 * Introduced nxp_lpc54xxx_m4.dtsi based on nxp_lpc54xxx.dtsi * Moved some pinmux related defines into SoC code. Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-05-16 02:47:24 +08:00
#define IOCON_PIO_INPFILT_OFF 0x0100u
#define IOCON_PIO_INV_DI 0x00u
#define IOCON_PIO_MODE_INACT 0x00u
#define IOCON_PIO_OPENDRAIN_DI 0x00u
#define IOCON_PIO_SLEW_STANDARD 0x00u
#define IOCON_PIO_MODE_PULLUP 0x10u
soc: define gpio pull-down for LPC54114 Add define that maps to IOCON register PULL-DOWN bit. Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2019-10-09 20:28:11 +08:00
#define IOCON_PIO_MODE_PULLDOWN 0x08u
arch: nxp: lpc54xxx: Rename SoC bits from LPC54114 to LPC54114_M4 Rename various SoC related defines and files from just being LPC54114 to LPC54114_M4. This is in prep for supporting a build for the second core on the LPC54114 (the Cortex-M0+). * Renamed Kconfig SOC_LPC54114 to SOC_LPC54114_M4 * Renamed Kconfig.defconfig.lpc54114 to Kconfig.defconfig.lpc54114_m4 * Introduced nxp_lpc54xxx_m4.dtsi based on nxp_lpc54xxx.dtsi * Moved some pinmux related defines into SoC code. Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-05-16 02:47:24 +08:00
lpc: Add nxp_lpc soc family to soc directory Add soc configuration support for lpc soc family, Kconfigs and soc files for lpcxxx soc. Add dtsi file for lpc54xxx. Signed-off-by: Shiksha Patel <shiksha.patel@nxp.com> Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-07-26 17:40:18 +08:00
#endif /* _SOC__H_ */