* Nucleo-L432KC board was missing internal MCU DAC code.
* DAC is now available on PA4/A3 and /dev/dac0 when enabled.
* Updated info on ADC inputs (PA6/A5,PA7/A6) depending on configuration.
Signed-off-by: Tomasz 'CeDeROM' CEDRO <tomek@cedro.info>
When we submit or update a Complex PR that affects All Architectures (Arm, RISC-V, Xtensa, etc): CI Workflow shall run only half the jobs for RISC-V, Xtensa and Simulator:
- `risc-v-01` to `03`
- `xtensa-01`
- `sim-01`
When the Complex PR is Merged: CI Workflow will still run all jobs for RISC-V, Xtensa and Simulator:
- `risc-v-01` to `06`
- `xtensa-01` to `02`
- `sim-01` to `02`
Simple PRs with One Single Arch / Board will build the same way as before:
- `risc-v-01` to `06`
- `xtensa-01` to `02`
- `sim-01` to `02`
We hope to lower drastically our usage of GitHub Runners before the ASF Deadline, as explained here: https://github.com/apache/nuttx/issues/14376
This commit simplified setitmer implementation by eliminating a redundant conditional branch.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
Renamed savedefconfig -> refreshsilent name more consistent with the refresh stage for cmake on github.
Added new savedefconfig to fix
https://github.com/apache/nuttx/issues/14281
Return 0 for CPU ID for any hart ID, and return the current Hart ID for
any CPU ID. At least these values are somewhat usable / meaningful in
non-SMP configurations.
Flag --diff will output the changes content.
Flag --check-only will return exit code. It can be used together with --diff.
Run isort again to format the code in place, to make the behavior same as before.
Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
MPFS implements external interrupt control on a per-hart basis i.e. there
are PLIC control registers for each hart separately. This means we need
a procedure to initialize such registers for each hart individually,
instead of only for the boot hart like it is now.
Fix this by implementing mpfs_plic_init_hart which can be called by each
hart as needed.
Note: it is not a good idea to initialize all harts from the boot hart,
as the boot hart may not know which harts are used by NuttX in AMP
configuration. It is better that the hart initializes itself.
Note: The hartid must be provided as explicit parameter, as it cannot
be queried via riscv_mhartid() yet; the per-cpu structure is initialized
later on which means riscv_mhartid() would return 0 for all harts except
the boot hart.
that pr requires chip turn on CONFIG_DRIVERS_BLUETOOTH to use bluetooth,
but not all defconig enable this option, so let's map bt_driver_register
to bt_netdev_register in header file in this case, and revert the unnessary
change in the related chip and board folders.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
When we submit or update a Complex PR that affects All Architectures (Arm, RISC-V, Xtensa, etc): CI Workflow shall run only half the jobs. Previously CI Workflow will run `arm-01` to `arm-14`, now we will run only `arm-01` to `arm-07`.
When the Complex PR is Merged: CI Workflow will still run all jobs `arm-01` to `arm-14`
Simple PRs with One Single Arch / Board will build the same way as before: `arm-01` to `arm-14`
This is explained here: https://github.com/apache/nuttx/issues/14376
Note that this version of `arch.yml` has diverged from `nuttx-apps`, since we are unable to merge https://github.com/apache/nuttx/pull/14377
When sig dispatch do up_schedule_sigaction, need to make a new frame to
run arm_sigdeliver. But the exception_direct cannot handle xcp.regs as
we are using c-function exception handler.
Need to use exception_common to handle SMP call.
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
In file included from modlib/modlib_symbols.c:34:
modlib/modlib_symbols.c: In function 'modlib_symvalue':
modlib/modlib_symbols.c:432:41: error: pointer of type 'void *' used in arithmetic [-Werror=pointer-arith]
432 | (uintptr_t)(sym->st_value + symbol->sym_value));
| ^
cc1: all warnings being treated as errors
make[1]: *** [Makefile:156: bin/modlib_symbols.o] Error 1
string/lib_strcpy.c:87:15: runtime error: signed integer overflow: -2132367969 - 16843009 cannot be represented in type 'long int'
#0 0x48e77096 in strcpy string/lib_strcpy.c:87
#1 0x535b6ea4 in libconfig_strbuf_append_string libconfig/lib/strbuf.c:60
#2 0x53ad7f52 in libconfig_yyparse /home/ygc/ssd/x4b-sim/external/libconfig/grammar.y:186
#3 0x5358d281 in __config_read libconfig/lib/libconfig.c:561
#4 0x5358dea0 in config_read_file libconfig/lib/libconfig.c:677
#5 0x52cdd0a5 in tts_vendor_list_get src/vendor.c:114
#6 0x52cde739 in default_tts_vendor_get src/vendor.c:356
#7 0x52a07e1d in vendorswitch_init src/vendorswitch/vendorswitch.c:501
#8 0x52444fb9 in mico_misc_main /home/ygc/ssd/x4b-sim/vendor/xiaomi/miai/mico_misc/instance/main.c:72
#9 0x48bee720 in nxtask_startup sched/task_startup.c:70
#10 0x48b41eb4 in nxtask_start task/task_start.c:112
#11 0x48c1ef3d in pre_start sim/sim_initialstate.c:52
Signed-off-by: yangguangcai <yangguangcai@xiaomi.com>
rootcause: in btuart_rxwork, read data in blocking mode and btuart_read do three times, maybe remote send some packets one time,so it wont read the sencond packets.
Signed-off-by: wangzhi7 <wangzhi7@xiaomi.com>
add bt_driver_register interface, which could handle
these cases:bth4 bth5 btbridge btslip and btuart_lowerhalf_s etc.
Signed-off-by: chengkai <chengkai@xiaomi.com>
raiden00pl