Commit Graph

44672 Commits

Author SHA1 Message Date
ligd 5b027f5260 net: netdev_ioctl handle FIONBIO
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-28 23:26:34 +08:00
zhuyanlin d7391bf6bc xtensa: add xtensa arch oneshot ops
As xtensa timer is common in all xtensa chips,
Use oneshot ops, implement a common xtensa oneshot timer.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-03-28 22:55:00 +08:00
ligd 0f02791ae6 armv8-m: add wake_func arm_should_generate_nonsecure_busfault
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-28 22:52:28 +08:00
ligd 60fc933261 armv8-m: make the securefault handled by non-securefult
tee is secure cpu and ap is non-secure cpu.
The crash PC can get by IP (R12).

[ EMERG] [tee] arm_hardfault: Hard Fault escalation:
[ EMERG] [tee] arm_securefault: PANIC!!! Secure Fault:
[ EMERG] [tee] arm_securefault:         IRQ: 3 regs: 0x2400ff00
[ EMERG] [tee] arm_securefault:         BASEPRI: 000000e0 PRIMASK: 00000000 IPSR: 00000003 CONTROL: 0000000c
[ EMERG] [tee] arm_securefault:         CFSR: 00000000 HFSR: 40000000 DFSR: 00000000
[ EMERG] [tee] arm_securefault:         BFAR: 08006008 AFSR: 00000000 SFAR: 3c049ea0
[ EMERG] [tee] arm_securefault: Secure Fault Reason:
[ EMERG] [tee] arm_securefault:         Attribution unit violation
[ EMERG] [tee] arm_securefault_handled_by_ns: Non-sec sp 3c475678
[ EMERG] [ap] arm_busfault: PANIC!!! Bus Fault:
[ EMERG] [ap] arm_busfault:     IRQ: 5 regs: 0x3c475608
[ EMERG] [ap] arm_busfault:     BASEPRI: 000000e0 PRIMASK: 00000000 IPSR: 00000005 CONTROL: 00000004
[ EMERG] [ap] arm_busfault:     CFSR: 00000100 HFSR: 40000000 DFSR: 00000000 BFAR: 08006008 AFSR: 20000000
[ EMERG] [ap] arm_busfault: Bus Fault Reason:
[ EMERG] [ap] arm_busfault:     Instruction bus error
[ EMERG] [ap] up_assert: Assertion failed at file:armv8-m/arm_busfault.c line: 105 task: nsh_main
[ EMERG] [ap] backtrace:
[ EMERG] [ap] [ 9] [<0x2c565246>] up_backtrace+0xa/0x168
[ EMERG] [ap] [ 9] [<0x2c550118>] sched_dumpstack+0x1c/0x60
[ EMERG] [ap] [ 9] [<0x2c5645d6>] up_assert+0x4e/0x324
[ EMERG] [ap] [ 9] [<0x2c54a98e>] _assert+0x2/0x10
[ EMERG] [ap] [ 9] [<0x2c5636d4>] arm_busfault+0xc8/0x15c
[ EMERG] [ap] [ 9] [<0x2c523070>] irq_dispatch+0x40/0x11c
[ EMERG] [ap] [ 9] [<0x2c563424>] arm_doirq+0x28/0x3c
[ EMERG] [ap] [ 9] [<0x2c55c892>] exception_common+0x4a/0xac
[ EMERG] [ap] [ 9] [<0x2c58668e>] nsh_parse_command+0x976/0x12b4
[ EMERG] [ap] [ 9] [<0x2c849cee>] write+0x52/0x74
[ EMERG] [ap] [ 9] [<0x2c58c0ac>] nsh_session+0x2c/0x1c8
[ EMERG] [ap] [ 9] [<0x2c58d82c>] nsh_consolemain+0x28/0x54
[ EMERG] [ap] [ 9] [<0x2c590352>] nsh_main+0x2a/0x48
[ EMERG] [ap] [ 9] [<0x2c5500da>] cxx_initialize+0x2a/0x4c
[ EMERG] [ap] [ 9] [<0x2c550090>] nxtask_startup+0x14/0x34
[ EMERG] [ap] [ 9] [<0x2c52966a>] nxtask_start+0x92/0xb8
[ EMERG] [ap] arm_registerdump: R0: 3c049ea0 R1: 00000004 R2: 3c448f98  R3: 00000000
[ EMERG] [ap] arm_registerdump: R4: 3c476a98 R5: 3c049ea0 R6: 00000000  FP: 3c476aac
[ EMERG] [ap] arm_registerdump: R8: 2c5873c9 SB: 3c049ea0 SL: 3c2e98fc R11: 3c284c2c
[ EMERG] [ap] arm_registerdump: IP: 2c58ba4a SP: 3c4756e0 LR: 3c049ea4  PC: 00000000
[ EMERG] [ap] arm_registerdump: xPSR: 610f0000 BASEPRI: 000000e0 CONTROL: 00000004
[ EMERG] [ap] arm_registerdump: EXC_RETURN: ffffffa8
[ EMERG] [ap] arm_dump_stack: IRQ Stack:
[ EMERG] [ap] arm_dump_stack: sp:     3c41c900

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-28 22:52:28 +08:00
Jiuzhu Dong b03f2e34b8 lseek: use type:off_t for return value
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-03-28 22:49:37 +08:00
Jiuzhu Dong a8866132c2 ramlog: support setting threshold value of ramlog for poll waiters
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-03-28 22:48:56 +08:00
ligd ed49aa1906 pm: remove unnecessary depends on OSINIT_OS_READY
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-28 22:48:14 +08:00
Ville Juven 43d5f60a74 MPFS: Fix issue with external interrupt detection
The bitmask overflow'd. Failing test is at mpfs_irq_dispatch / line 69
2022-03-28 22:40:11 +08:00
Ville Juven 30c25a95f3 MPFS: Fix error in flat build linker script
Use sram instead of ksram (copy&paste error)
2022-03-28 14:05:51 +03:00
zhuyanlin c0c0ffdf2f xtensa: add xtensa_spill_window declaration
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-03-28 12:33:07 +02:00
yinshengkai cdabac7ab1 nuttx/include: fix list.h type error
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2022-03-28 12:43:27 +03:00
Huang Qi ad1098d413 arch/armv7-a: Fix a typo in Toolchain.defs
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-28 12:42:43 +03:00
Xiang Xiao 7b97b3ad70 input/touchscreen: Fix the typo error
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-28 12:33:48 +03:00
Xiang Xiao 3aaa7e8591 arch/sim: Remove "or 480" from Kconfig
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-28 09:16:38 +03:00
Xiang Xiao 30e80f2394 arch/sim: Remove the unused SIM_TCNWAITERS from Kconfig
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-28 09:16:38 +03:00
lishaoen aa0c9fd788 nuttx: Add new config ARM_HAVE_MVE for MVE instruction
Signed-off-by: lishaoen <lishaoen@xiaomi.com>
2022-03-28 08:51:24 +03:00
Huang Qi 83a5e9958f arch/risc-v: Correct comments for current implementations
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-28 13:41:57 +08:00
Huang Qi 35f9265483 arch/risc-v: Move fpu [re]store to common place
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-28 13:41:57 +08:00
Petro Karashchenko 98ba65c422 c89: get rid of designated initializers in common code
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-03-28 13:39:27 +08:00
Lee Lup Yuen c67272f9c8 riscv/bl602: Enable SPI Master in SPI Poll Send
## Summary

SPI Poll Send `bl602_spi_poll_send()` doesn't send any SPI Data because it doesn't enable SPI Master and it doesn't clear the SPI FIFO. Also it hangs because it loops forever waiting for the FIFO.

We fix this problem by moving the code that enables SPI Master and clears the FIFO, from SPI Poll Exchange `bl602_spi_poll_exchange()` to SPI Poll Send. (Note that SPI Poll Exchange calls SPI Poll Send)

[More Details Here](https://github.com/lupyuen/st7789-nuttx#fix-spi-send)

## Impact

This problem affects all NuttX Drivers that call `SPI_SEND()` on BL602, including the ST7789 Display Driver.

Previously `SPI_SEND()` didn't send any SPI Data and never returns, because it loops forever waiting to receive data.

Now `SPI_SEND()` sends data and returns correctly.

[More Details Here](https://github.com/lupyuen/st7789-nuttx#fix-spi-send)

## Testing

We tested the modified SPI Poll Send with NuttX ST7789 Driver and a Logic Analyser on PineCone BL602:

-  [Testing with Logic Analyser](https://github.com/lupyuen/st7789-nuttx#fix-spi-send)

We also tested LVGL with ST7789 on PineCone BL602:

-  [Testing with LVGL](https://github.com/lupyuen/st7789-nuttx#run-lvgl-demo)

As for the modified SPI Poll Exchange, we tested with Semtech SX1262 SPI Transceiver on PineCone BL602:

-  [Testing SPI Poll Exchange](https://github.com/lupyuen/incubator-nuttx/releases/tag/release-2022-03-25)
2022-03-28 13:32:27 +08:00
Petro Karashchenko 989e8ac48f fs/romfs: fix size of pointer during memory allocation
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-03-28 10:47:50 +08:00
Xiang Xiao 8c8c60f70a arch: Add -fsanitize=kernel-address to ARCHCPUFLAGS if CONFIG_MM_KASAN=y
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-27 23:01:47 +03:00
ligd e87d262c7f arch/Toolchain.defs: add wildcard for EXTRA_LIBS
VELAPLATFO-1491

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-27 22:53:58 +03:00
Xiang Xiao a2e079fdd2 arch/arm: Change arm_arch.h to arm_internal.h in arm_perf.c
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-27 22:31:43 +03:00
Anthony Merlino baeb2e9af7 stm32h7: Addresses tickless PR review comments 2022-03-28 00:33:26 +08:00
Anthony Merlino 896435e7c9 Fixes formatting 2022-03-28 00:33:26 +08:00
Anthony Merlino c3745c8441 Adjust up_timer_getmask to handle 16-bit timers correctly. 2022-03-28 00:33:26 +08:00
Anthony Merlino 30f6dbc613 Throw compile time error if tickless timer is set to TIM6/TIM7 2022-03-28 00:33:26 +08:00
Anthony Merlino 95199f4790 stm32h7 timer: Clean up some bit operations to make them more readable. 2022-03-28 00:33:26 +08:00
Anthony Merlino e5c8bb9b34 stm32h7: Fix a bunch of tickless issues. 2022-03-28 00:33:26 +08:00
Anthony Merlino 2fad06008a stm32h7: Adds tickless support. 2022-03-28 00:33:26 +08:00
Petro Karashchenko c61710c7b8 boards/arm/uid: fix pointer to int compare
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-03-28 00:31:27 +08:00
Petro Karashchenko 2ac3e3c793 libs/libc/time: update description of strftime
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-03-28 00:30:53 +08:00
zouboan 466063ac9e sched/sched/sched_timerexpiration: change from sched_time to eventtime
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-03-27 18:22:58 +03:00
Xiang Xiao 01cb137277 crypto/random_pool: Remove the unused header file(unistd.h and nuttx/arch.h)
and include the used header files(nuttx/clock.h and nuttx/semaphore.h)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-27 14:27:11 +03:00
Jiuzhu Dong a721bc8830 fs/romfs: fix bug about test:examples/romfs
Mounting ROMFS filesystem at target=/usr/local/share with source=/dev/ram1
Traversing directory: /usr/local/share
  DIRECTORY: /usr/local/share/adir/
Traversing directory: /usr/local/share/adir
  FILE: /usr/local/share/adir/anotherfile.txt/
  DIRECTORY: /usr/local/share/adir/subdir/
Traversing directory: /usr/local/share/adir/subdir
  FILE: /usr/local/share/adir/subdir/subdirfile.txt/
Continuing directory: /usr/local/share/adir
  FILE: /usr/local/share/adir/yafile.txt/
Continuing directory: /usr/local/share
  FILE: /usr/local/share/afile.txt/
  FILE: /usr/local/share/hfile/
ERROR: ldir never found
Finished with  1 errors

Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-03-27 14:24:19 +03:00
ligd 0d365f6fb9 epoll: fix epoll close error, report by kasan
-#9  0xf7abf899 in __asan::__asan_report_load2 (addr=4072681776) at ../../../../../src/libsanitizer/asan/asan_rtl.cc:117
-#10 0x5693f718 in inode_release (node=0xf2c03124) at inode/fs_inoderelease.c:69
-#11 0x568ea61b in file_close (filep=0xf55fedd0) at vfs/fs_close.c:79
-#12 0x568e7e56 in nx_close (fd=3) at inode/fs_files.c:528
-#13 0x568e7f0e in close (fd=3) at inode/fs_files.c:562
-#14 0x56e76c39 in epoll_close (epfd=3) at vfs/fs_epoll.c:252
-#15 0x56c33829 in sensor_service_delete (ctrl=0x578b8540 <control>) at src/common.c:439
-#16 0x56a0561e in sensor_middle_service_main (argc=1, argv=0xf55de820) at sensor_main.c:118
-#17 0x56878675 in nxtask_startup (entrypt=0x56a054cc <sensor_middle_service_main>, argc=1, argv=0xf55de820) at sched/task_startup.c:70
-#18 0x5684427a in nxtask_start () at task/task_start.c:133
-#19 0xdeadbeef in ?? ()

reason:
epoll_close -> close -> epoll_do_close (free inode)
                     -> inode_release  (reuse inode, crash)

fix:
use the global inode to match the fd which will return to user.
like the g_sock_inode in fs/socket/socket.c

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-27 08:51:21 +03:00
Jiuzhu Dong 2ffca6d16d mm/mm_heap: output mallinfo when malloc failed
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-03-27 13:21:48 +08:00
Jiuzhu Dong 1ab58aff55 mm/heap: add MM_BACKTRACE_DEFAULT to config backtrace record by default
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-03-27 13:21:48 +08:00
Jiuzhu Dong 709207b8d3 mm/memdump: dynamic turn on backtrace in heap when enable DEBUG_MM
default turn off.
turn on: echo on > /proc/memdump
turn off: echo off > proc/memdump

Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-03-27 13:21:48 +08:00
Jiuzhu Dong 42664f4505 rpmsgfs/rename: fix bug about pathname align with 8bytes
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-03-27 05:16:13 +03:00
ligd f623ac0f13 armv7-m/armv8-m: move up_pref* api to common place
Signed-off-by: ligd <liguiding1@xiaomi.com>
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-03-26 13:39:18 +02:00
Huang Qi 052c071867 arch/risc-v: Minor style change
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-26 16:52:13 +09:00
Gustavo Henrique Nihei 0f0f85979e sim: Enable CXX_EXCEPTION and CXX_RTTI on C++ defconfigs
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-26 05:56:37 +02:00
Gustavo Henrique Nihei 2cd1769619 libxx: Add CXX_RTTI for enabling RTTI support for C++ applications
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-26 05:56:37 +02:00
Huang Qi 494230a841 arch/risc-v: Improve performance of context switch
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-26 07:19:09 +09:00
Eero Nurkkala b59dd92528 net/rpmsg: fix compile-time warning
Fix this compile-time warning:

rpmsg/rpmsg_sockif.c:381:24: warning: format '%d' expects argument of type 'int', but argument 3 has type 'ssize_t' {aka 'long int'} [-Wformat=]
  381 |                   nerr("circbuf_write overflow, %d, %d\n", written, len);
      |                        ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  ~~~~~~~
      |                                                            |
      |                                                            ssize_t {aka long int}

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-03-25 22:18:28 +08:00
Eero Nurkkala 1caf7d6f17 rptun: fix compile-time warning
Fix this compile-time warning:

rptun/rptun.c:956:22: warning: '%lx' directive output may be truncated writing between 1 and 16 bytes into a region of size 14 [-Wformat-truncation=]
  956 |   snprintf(arg1, 16, "0x%" PRIxPTR, (uintptr_t)priv);
      |                      ^~~~~
rptun/rptun.c:956:25: note: format string is defined here
  956 |   snprintf(arg1, 16, "0x%" PRIxPTR, (uintptr_t)priv);
rptun/rptun.c:956:22: note: directive argument in the range [1, 18446744073709551615]
  956 |   snprintf(arg1, 16, "0x%" PRIxPTR, (uintptr_t)priv);
      |                      ^~~~~
rptun/rptun.c:956:3: note: 'snprintf' output between 4 and 19 bytes into a destination of size 16
  956 |   snprintf(arg1, 16, "0x%" PRIxPTR, (uintptr_t)priv);
      |   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-03-25 22:18:28 +08:00
Gustavo Henrique Nihei 5198a56fe8 esp32s3-devkit: Fix the number of memory regions in some configurations
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-25 15:56:44 +02:00
Petro Karashchenko 7afedda89e arch/risc-v: improve style consistency accross chip variants
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-03-25 10:26:15 -03:00