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arch/risc-v: Move fpu [re]store to common place 

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This commit is contained in:
Huang Qi 2022-03-25 14:46:19 +08:00 committed by Xiang Xiao
parent 98ba65c422
commit 35f9265483
5 changed files with 5 additions and 28 deletions
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8
arch/risc-v/src/bl602/bl602_irq_dispatch.c
View File

@ -82,7 +82,6 @@ void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
irq_dispatch(irq, regs);
#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
/* Check for a context switch. If a context switch occurred, then
* CURRENT_REGS will have a different value than it did on entry. If an
* interrupt level context switch has occurred, then restore the floating
@ -92,12 +91,6 @@ void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
if (regs != CURRENT_REGS)
{
#ifdef CONFIG_ARCH_FPU
/* Restore floating point registers */
riscv_restorefpu((uintptr_t *)CURRENT_REGS);
#endif
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously
* running task is closed down gracefully (data caches dump,
@ -108,7 +101,6 @@ void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
group_addrenv(NULL);
#endif
}
#endif /* CONFIG_ARCH_FPU || CONFIG_ARCH_ADDRENV */
#endif /* CONFIG_SUPPRESS_INTERRUPTS */

10
arch/risc-v/src/c906/c906_irq_dispatch.c
View File

@ -111,7 +111,6 @@ void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
putreg32(irq - C906_IRQ_PERI_START, C906_PLIC_MCLAIM);
}
#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
/* Check for a context switch. If a context switch occurred, then
* CURRENT_REGS will have a different value than it did on entry. If an
* interrupt level context switch has occurred, then restore the floating
@ -121,12 +120,6 @@ void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
if (regs != CURRENT_REGS)
{
#ifdef CONFIG_ARCH_FPU
/* Restore floating point registers */
riscv_restorefpu((uintptr_t *)CURRENT_REGS);
#endif
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously
* running task is closed down gracefully (data caches dump,
@ -137,9 +130,8 @@ void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
group_addrenv(NULL);
#endif
}
#endif
#endif
#endif /* CONFIG_SUPPRESS_INTERRUPTS */
/* If a context switch occurred while processing the interrupt then
* CURRENT_REGS may have change value. If we return any value different

3
arch/risc-v/src/common/riscv_internal.h
View File

@ -70,10 +70,11 @@
#ifdef CONFIG_ARCH_FPU
#define riscv_savestate(regs) (regs = (uintptr_t *)CURRENT_REGS, riscv_savefpu(regs))
#define riscv_restorestate(regs) (CURRENT_REGS = regs, riscv_restorefpu((uintptr_t *)CURRENT_REGS))
#else
#define riscv_savestate(regs) (regs = (uintptr_t *)CURRENT_REGS)
#endif
#define riscv_restorestate(regs) (CURRENT_REGS = regs)
#endif
#define _START_TEXT &_stext
#define _END_TEXT &_etext

4
arch/risc-v/src/common/riscv_swint.c
View File

@ -223,6 +223,7 @@ int riscv_swint(int irq, void *context, void *arg)
{
DEBUGASSERT(regs[REG_A1] != 0);
CURRENT_REGS = (uintptr_t *)regs[REG_A1];
riscv_restorefpu((uintptr_t *)CURRENT_REGS);
}
break;
@ -246,9 +247,8 @@ int riscv_swint(int irq, void *context, void *arg)
case SYS_switch_context:
{
DEBUGASSERT(regs[REG_A1] != 0 && regs[REG_A2] != 0);
#ifdef CONFIG_ARCH_FPU
riscv_savefpu(regs);
#endif
riscv_restorefpu((uintptr_t *)regs[REG_A2]);
*(uintptr_t **)regs[REG_A1] = (uintptr_t *)regs;
CURRENT_REGS = (uintptr_t *)regs[REG_A2];
}

8
arch/risc-v/src/qemu-rv/qemu_rv_irq_dispatch.c
View File

@ -111,7 +111,6 @@ void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
}
#endif
#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
/* Check for a context switch. If a context switch occurred, then
* CURRENT_REGS will have a different value than it did on entry. If an
* interrupt level context switch has occurred, then restore the floating
@ -121,12 +120,6 @@ void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
if (regs != CURRENT_REGS)
{
#ifdef CONFIG_ARCH_FPU
/* Restore floating point registers */
riscv_restorefpu((uintptr_t *)CURRENT_REGS);
#endif
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously
* running task is closed down gracefully (data caches dump,
@ -137,7 +130,6 @@ void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
group_addrenv(NULL);
#endif
}
#endif /* CONFIG_ARCH_FPU || CONFIG_ARCH_ADDRENV */
/* If a context switch occurred while processing the interrupt then
* CURRENT_REGS may have change value. If we return any value different