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55724 Commits

Author SHA1 Message Date
yinshengkai cee252174b clock/perf: add critical section protection 
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
 2024-10-10 23:17:14 +08:00
Neo Xu d598da80e4 Rename group_argvstr to nxtask_argvstr 
Now argument vector is stored to TLS, task_argvstr fits better.

Signed-off-by: Neo Xu <neo.xu1990@gmail.com>
 2024-10-10 23:13:37 +08:00
Neo Xu c3ed24aec6 Remove check for group to retriev argv string 
Now the argument vector is stored in TLS, thus no need to check if group is valid

Signed-off-by: Neo Xu <neo.xu1990@gmail.com>
 2024-10-10 23:13:37 +08:00
yinshengkai c158ed2c32 mm/heap: memory alignment before executing kasan_register 
The unaligned address is used in kasan_register, but the aligned address is used in kasan_unregister.
The mismatch between the addr value and mm_heapstart will result in a crash due to the inability to unregister correctly.

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
 2024-10-10 23:11:37 +08:00
p-szafonimateusz ed71aa810e arch/x86_64/intel64/intel64_irq.c: fix busy irq logic 
use correct macro for cpu_set_t busy variable and remove obsolote check

also remove not needed #include <sched.h> and "Public data"

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-10-10 22:57:04 +08:00
yinshengkai fbaa7b29f4 tools/gcov: ignore lcov error 
When some coverage files cannot be parsed correctly,
skip the current error file and continue to generate coverage report

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
 2024-10-10 22:55:46 +08:00
yinshengkai 7516da1650 tools: gcov.sh supports generating device-side code coverage 
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
 2024-10-10 22:55:46 +08:00
yinshengkai 8abbd3cde5 nuttx-names.in: add feof 
When running gcov in sim, nuttx feof is called and causes crash

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
 2024-10-10 22:55:04 +08:00
liwenxiang1 fee7e0ce81 arch/x86_64:Add macros related to CPUID 
Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
 2024-10-10 15:07:45 +02:00
ouyangxiangzhen d0779e0eef arch/x86_64: Fix up_timer compilation error 
This commit fix up_timer compilation error.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
 2024-10-10 15:07:22 +02:00
ouyangxiangzhen e6548ead20 arch/x86_64: Fix up_timer_start 
Fix according to up_alarm_start.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
 2024-10-10 15:07:22 +02:00
yinshengkai b8670e905a docs: add gprof usage documentation 
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>

g 请为您的变更输入提交说明。以 '#' 开始的行将被忽略，而一个空的提交
 2024-10-10 18:46:51 +08:00
yinshengkai d375a09c0a libs: add gprof arm64 support 
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
 2024-10-10 18:46:51 +08:00
yinshengkai 1b42a7bf84 sched: gprof SMP support 
In the case of SMP, use smp_call to get other CPU data

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
 2024-10-10 18:46:51 +08:00
yinshengkai eb8449cb0c sched/gprof: add gprof support 
gprof can analyze code hot spots based on scheduled sampling.
After adding the "-pg" parameter when compiling, you can view the code call graph.

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
 2024-10-10 18:46:51 +08:00
Xiang Xiao 4944bfd56c sched: Implement profil function 
which is very useful for performance analysis:
https://man7.org/linux/man-pages/man3/profil.3.html

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2024-10-10 18:46:51 +08:00
Eren Terzioglu f774afb4d9 esp32[s3|s2]: Add temperature sensor thread support 2024-10-10 18:45:01 +08:00
Eren Terzioglu 7556614732 esp32[c3|c6|h2]: Add temperature sensor thread support 2024-10-10 18:45:01 +08:00
Eren Terzioglu 4060f6ba80 esp32[s2|s3]: Add UORB support for internal temperature sensor 2024-10-10 18:45:01 +08:00
Eren Terzioglu 929f9ccfa2 esp32[c3|c6|h2]: Add UORB support for internal temperature sensor 2024-10-10 18:45:01 +08:00
hujun5 7216d566a6 sim: only POSIX implementation (ARCH_HAVE_MULTICPU) is provided 
This commit fixes the regression from https://github.com/apache/nuttx/pull/13886

Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-10-10 18:38:25 +08:00
liwenxiang1 24f54ba712 arch/x86_64: cache convert all asm() to __asm__() 
asm() is not supported by -std=c99, __asm__() is more portable

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
 2024-10-10 18:36:09 +08:00
hujun5 d26c2380e4 sched: fix omitted merging the pending queue regression 
This commit fixes the regression from https://github.com/apache/nuttx/pull/13995

Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-10-10 17:59:35 +08:00
zhangyuan29 8acc3b4771 sched/pthread: save pid before task activate 
When a high-priority pthread is created,
ptcb may be released after nxtask_activate.

Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
 2024-10-10 17:58:22 +08:00
andi6 2ed88f8813 x64: add acrn ioapic init support 
if we two step to set interrupt trigger and disable interrupt,
acrn will inject #GP exception

Signed-off-by: andi6 <andi6@xiaomi.com>
 2024-10-10 17:49:40 +08:00
anjiahao f955eda358 uart_16550:fix bug, regincr is used multiple times 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2024-10-10 17:49:18 +08:00
liwenxiang1 8d2fc5c9ee arch/x86_64:Add nanosecond delay interface to TSC 
Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
 2024-10-10 17:13:01 +08:00
cuiziwei f86644141b x86_64:Fix ld error. 
LD: nuttx.elf
ld:in function `std::__1::ios_base::imbue(std::__1::locale const&)':
nuttx/libs/libxx/libcxx/src/ios.cpp:129: undefined reference to `_Unwind_Resume'

Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
 2024-10-10 16:51:38 +08:00
dongjiuzhu1 ae19554c66 boards/sam3u-ek/knsh: disable pthread to reduce flash size 
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
 2024-10-10 16:42:15 +08:00
dongjiuzhu1 5a29652d2a fs/inode: using read-lock to protect inode_find 
inode_find don't need to modify inode tree

Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
 2024-10-10 16:42:15 +08:00
dongjiuzhu1 2e3a6acaa2 sched/sem_rw: convert read-lock to write-lock when self already holds a write-lock 
If the write lock is already held by oneself and sine the write
lock can be recursively held, so, this operation can be converted to a write
lock to avoid deadlock.

Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
 2024-10-10 16:42:15 +08:00
wangming9 1c2856dfcb arch/arm64: Fixed up_getusrsp getting stack Pointers 
Signed-off-by: wangming9 <wangming9@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-10 15:40:03 +08:00
wangming9 b0ea6840e1 arch/arm64: Use serr to print fatal error messages. 
Summary:
sinfo cannot print fatal error messages when CONFIG_DEBUG_SCHED_INFO is turned off.

Signed-off-by: wangming9 <wangming9@xiaomi.com>
 2024-10-10 15:40:03 +08:00
wangming9 27d77b1aca arch/arm64: Fixed GIC3 for goldfish platform 
Signed-off-by: wangming9 <wangming9@xiaomi.com>
 2024-10-10 15:40:03 +08:00
wangming9 b3e640cf3f arch/arm64: GICv2 detection is compatible with different qemu versions 
Summary:
- GICv2 cannot be detected on the golsfish platform
- Golsfish uses version 2.12.0 of qemu with a GICC_IIDR value of 0,
  read ICPIDR2 to determine the GIC version

Signed-off-by: wangming9 <wangming9@xiaomi.com>
 2024-10-10 15:40:03 +08:00
Bowen Wang a847ee1675 qmeu_boot: add rpmsg syslog init for arm64 qemu chip 
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
 2024-10-10 15:40:03 +08:00
wangming9 e48b81ebe9 arch/arm64: Supports cluster PMU 
Summary:
Some processors implement cluster PMUs, such as Cortex-R82.

Signed-off-by: wangming9 <wangming9@xiaomi.com>
 2024-10-10 15:40:03 +08:00
wangming9 fa96350574 arch/arm64: Modify the method for obtaining the CPU frequency 
Summary:
1、cntfrq_el0 is used to store the timer frequency, which may
   be different from the CPU frequency.
2、Do not use up_perf interface for SMP.

Signed-off-by: wangming9 <wangming9@xiaomi.com>
 2024-10-10 15:40:03 +08:00
yangguangcai e9b77833e3 goldfish:config pl031. 
Signed-off-by: yangguangcai <yangguangcai@xiaomi.com>
 2024-10-10 15:40:03 +08:00
liwenxiang1 f858026819 arch/x86_64:Add allsymbol functionality 
Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
 2024-10-10 14:56:08 +08:00
ouyangxiangzhen 93890321c5 sched/wdog: Fix code style 
This commit fixed code style issue left by the previous patch.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
 2024-10-10 13:57:46 +08:00
Huang Qi 20cba94a86 risc-v/espressif: Fix alert message in `esp_setup_irq()` 
Correct the alert message in `esp_setup_irq()` if
irq number allocation fails, the parameter number is not
matched with format specifier.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2024-10-10 13:41:34 +08:00
liwenxiang1 e3b3a6145a arch/x86_64: idle convert all asm() to __asm__() 
Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
 2024-10-10 13:40:39 +08:00
liwenxiang1 1af831e139 arch/x86_64: cpuid expect 32 bit variables 
Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
 2024-10-10 12:03:27 +08:00
liwenxiang1 2448e8a59e arch/x86_64:Add perf tool 
Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
 2024-10-10 12:01:16 +08:00
liwenxiang1 f81c7dbc93 arch/x86_64:Use the checkstack function 
Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
 2024-10-10 11:40:15 +08:00
liwenxiang1 2f26323388 arch/libc: Integrate vfork into fork, and vfork directly call up_fork 
Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
 2024-10-10 08:45:03 +08:00
hujun5 67c9a7aabd sched: remove param in nxsched_remove_readytorun 
after
   text    data     bss     dec     hex filename
 269732   51065   63335  384132   5dc84 nuttx

before
   text    data     bss     dec     hex filename
269784   51065   63335  384184   5dcb8 nuttx

size -50

Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-10-10 08:44:52 +08:00
yintao 37a30023f5 nuttx/drivers: add ept_release_cb for destroy server resource 
use ept_release_cb to destory rpmsg services server dile resource
to avoid the used-after-free issue

Signed-off-by: yintao <yintao@xiaomi.com>
 2024-10-10 08:44:29 +08:00
Lup Yuen Lee 80d03cb296 CI: Split the RISC-V Build Jobs into smaller jobs 
To speed up the CI Workflow, this PR splits the CI Build Jobs for RISC-V into smaller jobs. Each job will now complete within 1 hour.

Before the PR: There are 2 jobs for RISC-V, each requiring more than 1.5 hours
- `risc-v-01` (1 hour 42 mins): BL602, Ox64, ESP32-C3 / C6 / H2
- `risc-v-02` (1 hour 41 mins): K230, Icicle, QEMU, RV32M1-Vega

After the PR: The build is spread across 6 jobs for RISC-V, each job completes within 1 hour
- `risc-v-01` (19 mins): BL602, Ox64
- `risc-v-02` (44 mins): ESP32-C3
- `risc-v-03` (45 mins): ESP32-C6, ESP32-H2
- `risc-v-04` (31 mins): K230, Icicle
- `risc-v-05` (41 mins): QEMU CITest
- `risc-v-06` (38 mins): Rest of QEMU, RV32M1-Vega

Following the same convention as the Arm32 Build Jobs, the above jobs are sorted by Target Name. Performance of the RISC-V Build Jobs is discussed in https://github.com/apache/nuttx/issues/13775
 2024-10-10 08:44:02 +08:00