arch/arm64: Use serr to print fatal error messages.
Summary: sinfo cannot print fatal error messages when CONFIG_DEBUG_SCHED_INFO is turned off. Signed-off-by: wangming9 <wangming9@xiaomi.com>
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27d77b1aca
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@ -301,8 +301,8 @@ static const char *esr_get_desc_string(uint64_t esr)
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static void print_ec_cause(uint64_t esr)
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{
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sinfo("%s\n", esr_get_class_string(esr));
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sinfo("%s\n", esr_get_desc_string(esr));
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serr("%s\n", esr_get_class_string(esr));
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serr("%s\n", esr_get_desc_string(esr));
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}
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static int default_fatal_handler(struct regs_context *regs,
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@ -312,7 +312,7 @@ static int default_fatal_handler(struct regs_context *regs,
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/* Data Fault Status Code. */
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sinfo("(IFSC/DFSC) for Data/Instruction aborts: %s\n", inf->name);
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serr("(IFSC/DFSC) for Data/Instruction aborts: %s\n", inf->name);
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return -EINVAL; /* "fault" */
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}
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@ -322,7 +322,7 @@ static int default_debug_handler(struct regs_context *regs,
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{
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struct fatal_handle_info *inf = g_debug_handler + DBG_ESR_EVT(esr);
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sinfo("Default Debug Handler: %s\n", inf->name);
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serr("Default Debug Handler: %s\n", inf->name);
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return -1; /* "fault" */
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}
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@ -338,7 +338,7 @@ static int arm64_el1_pc(struct regs_context *regs, uint64_t esr)
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{
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uint64_t far = read_sysreg(far_el1);
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sinfo("SP/PC alignment exception at 0x%" PRIx64 "\n", far);
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serr("SP/PC alignment exception at 0x%" PRIx64 "\n", far);
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return -EINVAL; /* "fault" */
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}
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@ -346,7 +346,7 @@ static int arm64_el1_bti(struct regs_context *regs, uint64_t esr)
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{
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uint64_t far = read_sysreg(far_el1);
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sinfo("BTI exception at 0x%" PRIx64 "\n", far);
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serr("BTI exception at 0x%" PRIx64 "\n", far);
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return -EINVAL; /* "fault" */
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}
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@ -354,17 +354,17 @@ static int arm64_el1_undef(struct regs_context *regs, uint64_t esr)
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{
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uint32_t insn;
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sinfo("Undefined instruction at 0x%" PRIx64 ", dump:\n", regs->elr);
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serr("Undefined instruction at 0x%" PRIx64 ", dump:\n", regs->elr);
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memcpy(&insn, (void *)(regs->elr - 8), 4);
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sinfo("0x%" PRIx64 " : 0x%" PRIx32 "\n", regs->elr - 8, insn);
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serr("0x%" PRIx64 " : 0x%" PRIx32 "\n", regs->elr - 8, insn);
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memcpy(&insn, (void *)(regs->elr - 4), 4);
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sinfo("0x%" PRIx64 " : 0x%" PRIx32 "\n", regs->elr - 4, insn);
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serr("0x%" PRIx64 " : 0x%" PRIx32 "\n", regs->elr - 4, insn);
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memcpy(&insn, (void *)(regs->elr), 4);
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sinfo("0x%" PRIx64 " : 0x%" PRIx32 "\n", regs->elr, insn);
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serr("0x%" PRIx64 " : 0x%" PRIx32 "\n", regs->elr, insn);
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memcpy(&insn, (void *)(regs->elr + 4), 4);
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sinfo("0x%" PRIx64 " : 0x%" PRIx32 "\n", regs->elr + 4, insn);
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serr("0x%" PRIx64 " : 0x%" PRIx32 "\n", regs->elr + 4, insn);
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memcpy(&insn, (void *)(regs->elr + 8), 4);
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sinfo("0x%" PRIx64 " : 0x%" PRIx32 "\n", regs->elr + 8, insn);
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serr("0x%" PRIx64 " : 0x%" PRIx32 "\n", regs->elr + 8, insn);
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return -1;
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}
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@ -375,7 +375,7 @@ static int arm64_el1_fpac(struct regs_context *regs, uint64_t esr)
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/* Unexpected FPAC exception in the kernel. */
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sinfo("Unexpected FPAC exception at 0x%" PRIx64 "\n", far);
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serr("Unexpected FPAC exception at 0x%" PRIx64 "\n", far);
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return -EINVAL;
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}
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@ -463,7 +463,7 @@ static int arm64_el1_exception_handler(uint64_t esr,
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default:
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{
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sinfo("64-bit el1h sync, esr = 0x%x", ec);
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serr("64-bit el1h sync, esr = 0x%x", ec);
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ret = -EINVAL;
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}
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}
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@ -527,10 +527,10 @@ static int arm64_exception_handler(struct regs_context *regs)
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if (ret != 0)
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{
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sinfo("CurrentEL: %s\n", el_str);
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sinfo("ESR_ELn: 0x%" PRIx64 "\n", esr);
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sinfo("FAR_ELn: 0x%" PRIx64 "\n", far);
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sinfo("ELR_ELn: 0x%" PRIx64 "\n", elr);
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serr("CurrentEL: %s\n", el_str);
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serr("ESR_ELn: 0x%" PRIx64 "\n", esr);
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serr("FAR_ELn: 0x%" PRIx64 "\n", far);
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serr("ELR_ELn: 0x%" PRIx64 "\n", elr);
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print_ec_cause(esr);
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}
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