Commit Graph

7114 Commits

Author SHA1 Message Date
Curtis Malainey ffbc717c30 style: make delcaration match implementations
minor style violation, these should match exactly

Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
2021-10-15 14:14:40 +01:00
Curtis Malainey fb834b68c1 dmic: conditionally include variables
conditionally used variables should be conditionally compiled in

Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
2021-10-15 14:14:40 +01:00
Curtis Malainey ae8b2e0730 crossover: fix return type
Can't return a negative error if we are returning an unsigned type.
C is great right? No reason to ever use something like rust...

Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
2021-10-15 14:14:40 +01:00
Curtis Malainey 2c4f57d0f2 codec_adapter: remove pointless null pointer check
We should always have a dev, and even if we didn't we would crash here
because we logged above in debug using dev and we are logging the
error itself using dev.

Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
2021-10-15 14:14:40 +01:00
Curtis Malainey b72d3c2446 dmic: change condition to satisfy cppcheck
cppcheck for some reason doesn't understand that j > 1 has nothing to do
with the indexing itself and this the check is pointless, so switch to
!= so it doesn't flag the issue anymore.

Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
2021-10-15 14:14:40 +01:00
Curtis Malainey 751cc6ddf8 numbers: fix signed int overflow
if we shift 1 left 31 times we will overflow the signed bit. Assuming
the intent is correct lets make this unsigned so cppcheck won't
complain.

Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
2021-10-15 14:14:40 +01:00
Curtis Malainey d648016b83 multiband_drc: fix null pointer check
cppcheck pointed out that either our nullpointer check was not needed or
that we are failing to do it before using the pointer. The check looks
valid so lets fix the lookup.

Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
2021-10-15 14:14:40 +01:00
Curtis Malainey 09703d33f6 dmic_nhlt: fix uninitialized value
cppcheck error

Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
2021-10-15 14:14:40 +01:00
Curtis Malainey 89afb8784d init: fix uninitiallized variable
we should never need it, but this is just to silence cppcheck

Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
2021-10-15 14:14:40 +01:00
Marc Herbert 33c13e8c17 xtensa-build-zephyr: download rimage later, just before needed
This helps catch hidden rimage dependencies.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2021-10-15 12:22:00 +01:00
Marc Herbert 7c0f032266 xtensa-build-zephyr: extract new download_missing_submodules() function
This makes testing submodule issues easier.

Absolutely zero functional change.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2021-10-15 12:22:00 +01:00
Ranjani Sridharan bd918ada7f trace: Add SOF_IPC_TRACE_DMA_FREE IPC command
This will be used to stop the trace DMA and free
its resources. This change is tagged for ABI 3.20.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2021-10-15 12:17:38 +01:00
Keyon Jie b7a469e884 platform: cavs: add config item for IMR restore feature
Add kconfig item CAVS_IMR_D3_PERSISTENT to denote if IMR restore feature
will be used on an Intel cAVS platform.

It will be disabled by default, please only enable it where IMR content
is persistent when DSP in D3, as enabling it means we don't need to
re-downloading firmware binary to DSP SRAM so fast D3->D0 transition
will be supported.

Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
2021-10-15 11:38:27 +01:00
Guennadi Liakhovetski 292395a503 Revert "schedule: add a core index for schedule_data"
This reverts commit a398e92f2e.

Schedulers are per-core already, no need to further verify that.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2021-10-15 11:28:53 +01:00
Kai Vehmanen ba4406e2b7 zephyr: align non-cached allocs to PLATFORM_DCACHE_ALIGN
The XTOS allocator aligns non-cachec allocations to the platform
cacheline size. Test results indicate some SOF application code
relies on this behaviour, so align Zephyr's rmalloc implementation
to match the behaviour.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2021-10-15 09:28:28 +01:00
Kai Vehmanen 9567c97fb3 zephyr: enable cached heap by default for Intel cAVS platforms
Set default as yes for SOF_ZEPHYR_HEAP_CACHED for Intel cAVS.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2021-10-15 09:28:28 +01:00
Kai Vehmanen 956a587663 zephyr: reimplement cached heap zone on single Zephyr sys_heap
Implement the cached SOF heap zones using a single sys_heap
object.

Compared to old implementation which used two separate sys_heaps,
this implementation enables dynamic cached/uncached partitioning
of the heap.

To ensure coherency of the Zephyr heap operation, if cached heap
is enabled, all allocations must be aligned to dcache linesize.

Add a Kconfig option CONFIG_SOF_ZEPHYR_HEAP_CACHED to turn on/off
the cached heap logic, with default set to no for all platforms.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2021-10-15 09:28:28 +01:00
Andy Ross f0415135ea zephyr: Correct heap cache management
The heap code was invalidating blocks on allocation, but that's the
wrong side of the pipe.  By definition, new heap memory
will/should/must be written before being used (because the memory is
undefined), so any cached contents are irrelevant as they'll be
overwritten.

But when the user is finished with the block and frees it, there may
still be live dirty cache lines in the region on the current CPU.
Those must be invalidated, otherwise they will be evicted from the
cache at some point in the future, on top of the memory region now
being used for different purposes on another CPU.

Remove the invalidate on allocation.  Add it back in free.  Leverage a
new Zephyr sys_heap_usable_size() routine to get the size so we don't
have to store it in an extra header.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-10-15 09:28:28 +01:00
Keyon Jie 8107d6a41b alloc: free_block: perform wb/inv for the blocks
When freeing blocks, we need to perform writeback and invalidate to the
dirty cache lines, otherwise, they will be evicted from the cache at
some point in the future, which will break the usage of the same memory
region from another DSP core.

Introduce a free_ptr to make sure the original 'ptr' is not changed, so
we can use it for this wb/inv operation.

Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
2021-10-14 14:52:54 +01:00
Guennadi Liakhovetski 6ce3237509 zephyr: apl: re-enable building with XCC
Zephyr XCC builds for Apollolake can be re-enabled now after the RAM
footprint has been reduced.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2021-10-14 14:01:57 +01:00
Guennadi Liakhovetski 4337831643 zephyr: further reduce the size of heap on APL with XCC
Building SOF with Zephyr for Apollolake with XCC fails because of
insufficient RAM. Reduce the heap size to fix the problem.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2021-10-14 14:01:57 +01:00
Rander Wang cbf5aa6fbc ipc4: fix ipc4 build failed
Ipc4 checks manifest in fw binary, so it needs to
use header files in rimage

Signed-off-by: Rander Wang <rander.wang@intel.com>
2021-10-14 13:53:46 +01:00
Rander Wang 6a297b4ed7 ipc4: add get & set large config support in ipc framework
Get_large_config is used for driver to query module information
and set_large_config is used to change module config dynamically

Signed-off-by: Rander Wang <rander.wang@intel.com>
2021-10-14 13:53:46 +01:00
Rander Wang 3efd78048d ipc4: add basefw component support
The module id of basefw is zero. Driver get & set global
states by this id, such as platform info, memory inf, hw
info, power info.

There are three types of elf binary built by SOF: boot_loader,
basefw which is built from all sof entities selected in kconfig
and external libraries developed by 3rd party and may be close-source.
Rimage packs boot_loader and basefw into sof-xxx.ri.

This patch adds limited support of features in basefw module and more
features will be added in future.

Signed-off-by: Rander Wang <rander.wang@intel.com>
2021-10-14 13:53:46 +01:00
Peter Ujfalusi 1c1243b890 lib: dai: Drop temporary variable use from dai.h
The use of temporary variables in the header was introduced by
commit 1bb78a5cab ("dma: use platform_shared_commit()")

When the platform_shared_commit() use is removed by
commit 580b9cf005 ("memory: remove platform_shared_commit() as it's a NOP on all platforms.")

The temporary variables remained for no reason.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2021-10-13 15:52:38 +01:00
Peter Ujfalusi 76de2bb8d6 lib: dma: Drop temporary variable use from dma.h and blank lines
The use of temporary variables in the header was introduced by
commit 1bb78a5cab ("dma: use platform_shared_commit()")

When the platform_shared_commit() use is removed by
commit 580b9cf005 ("memory: remove platform_shared_commit() as it's a NOP on all platforms.")

The temporary variables remained for no reason.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2021-10-13 15:52:38 +01:00
Peter Ujfalusi 60ab692ce5 drivers: Intel: hda-dma: Remove not needed 'ret' variables
Remove the 'ret' variable from hda_dma_release() and
hda_dma_get_attribute() as there is no need for them.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2021-10-13 15:52:38 +01:00
Brent Lu b50afe03cd topology: sof-tgl-max98357a-rt5682: add support for max98360a
Add support for max98360a running on ADL boards. We choose SSP1 for
speaker amplifier for BT offload compatibility. Also increase the
sample depth to 32 bits for more dynamic range and avoid using m/n
counter.

We add the flag SSP_CC_BCLK_ES to SSP0 for the compatibility with
CS42L42 in the future.

Signed-off-by: Brent Lu <brent.lu@intel.com>
2021-10-13 14:54:22 +01:00
Marc Herbert eed75e08aa cmake: remove spurious run_rimage dependency on run_smex
Preserve the top-level dependency on run_smex (through
copy_dictionaries) so dictionaries are still built by default when
CONFIG_TRACE is true.

Fixes commit dad6b192f6 ("cmake: fix smex dependencies"). That commit
successfully removed the dependency when CONFIG_TRACE is false but it
didn't go far enough: run_rimage is _never_ dependent on run_smex.

This means dictionaries can now be built in parallel.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2021-10-13 11:54:51 +01:00
Marc Herbert 6bff26e971 cmake: remove spurious rimage and smex dependencies on sof_dump
rimage and smex don't depend on disassembly. Nothing does yet this adds
sof_dump as a top-level, 'bin' dependency so "make bin" still builds it
and so this commit does not cause any interface change.

This makes it possible to disassemble in parallel with the end of the
build.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2021-10-13 11:54:51 +01:00
Marc Herbert 05fef94149 cmake: don't post-process build/src/arch/xtensa/sof-platf in place
No build target should ever change files in place. This causes subtle
and time-consuming issues:

- The most obvious, logical issue is making incremental builds
  impossible: if the build stops at the "in-place" step for any reason
  then the build system does not know where to resume.

- When working on the build system itself, the file
  `build/src/arch/xtensa/sof-platf` after `make `prepare_sof_post_process`
  is different from the one after `make sof_post_process` which is
  confusing and time-consuming.

- Additional confusion in this case (not addressed by this commit): the
  final build/sof.ri is NOT generated from build/sof but from
  build/src/arch/xtensa/sof-platf instead.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2021-10-13 11:54:51 +01:00
Peter Ujfalusi 9823983a0f dma-trace: Allow DMA re-configuration
The host will receive an error if it tries to re-configure the dtrace:

[    22736132.117381] (          28.645832) c0 hda-dma            ..../intel/hda/hda-dma.c:489  ERROR hda-dmac: 4 no free channel 0
[    22736147.377797] (          15.260416) c0 dma-copy                 src/ipc/dma-copy.c:163  ERROR dma_copy_set_stream_tag(): dc->chan is NULL
[    22736180.346545] (          32.968750) c0 ipc                  src/ipc/ipc3/handler.c:805  ERROR ipc: failed to enable trace -22

Since we try to request an already used channel. If we skip the requesting
then we will fail with the configuration:

[    31707957.542122] (          27.447916) c0 dma-copy                 src/ipc/dma-copy.c:162  ERROR dma_copy_set_stream_tag(): already have chan for stream_tag 1
[    31708021.917120] (          64.375000) c0 hda-dma            ..../intel/hda/hda-dma.c:539  ERROR hda-dmac: 4 channel 0 busy. dgcs 0x800000 status 5
[    31708056.083785] (          34.166664) c0 ipc                  src/ipc/ipc3/handler.c:805  ERROR ipc: failed to enable trace -16

To support the reconfiguration:
if we have DMA channel for dtrace, stop it to allow the reconfiguration.
In the unlikely case when the stream_id has changed, release the channel
as well and request a new one.

Tested with the SOF client kernel by rmmod and modprobe the dtrace client
during active audio playback to prevent the DSP to be turned off.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2021-10-12 15:15:47 +01:00
Peter Ujfalusi aee99a9594 dma-trace: Implement clenaup on error in dma_trace_start()
After the dma_copy_set_stream_tag() a DMA channel is requested, release it
in any of the error cases later.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2021-10-12 15:15:47 +01:00
Marc Herbert b039018d0a drivers: imx: sdma: use %p to print dma_base(dma)
Use %p so the higher 32 bits are not quietly lost if dma_base ever
becomes 64 bits.

Fixes commit be69f41bef ("drivers: imx: sdma: fix warning")

Issue found by chance in unrelated PR #4837

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2021-10-07 15:14:33 +01:00
Ajit Kumar Pandey d4254be1ad topology: topology1: Add initial topology for AMD Renoir
Add m4 and headers to support basic topology with passthrough
pipeline for ACPSP and DMIC use cases support on renoir platform.

Signed-off-by: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com>
Signed-off-by: balapati <balakishore.pati@amd.com>
2021-10-07 15:06:55 +01:00
Ranjani Sridharan 379a455a82 drivers: Intel: hda-dma: remove pause/release ops from hda_host_dma_ops
Host DMA is never paused/released. So, remove the pause
and release ops from the host DMA ops.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2021-10-05 15:43:09 +01:00
Ranjani Sridharan 863318ea9b lib: dma: make pause/release ops optional
Not all DMA's need a pause/release.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2021-10-05 15:43:09 +01:00
Ranjani Sridharan b7808276ee drivers: Intel: hda-dma: remove unnecessary code in start/release
Host DMA is never paused or released. Remove the code to
start host DMA during release and the check for release
in hda_dma_host_start().

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2021-10-05 15:43:09 +01:00
Ranjani Sridharan 8e6ef20086 drivers: Intel: hda-dma: FIFORDY bit is only valid for host DMA
So, leave this bit untouched for link DMA and only set/clear it
for the host DMA for both playback and capture.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2021-10-05 15:43:09 +01:00
Ranjani Sridharan 792afa326f drivers: Intel: hda-dma: remove check for config->cyclic
config->cyclic is not relevant for HDA DMAs. So remove
the check for it. We set config->cyclic to 1 for both
playback and capture for all DAI's anyway. So the check
today would never set FIFORDY for host output DMA
during set_config. But nevertheless, during the start
trigger, FIFORDY is set for all DMA's unconditionally.
That is also incorrect and will be fixed in the following
commit. For now, just remove the check for cyclic to
prepare for FIFORDY bit cleanup.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2021-10-05 15:43:09 +01:00
Iuliana Prodan 14c53857b2 codecs: cadence: src: Add external Cadence header for SRC support
This header is third party and contains expected definitions for the
codec adapter support to work.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2021-10-05 15:38:44 +01:00
Iuliana Prodan e340f8f22d codecs: cadence: src: Add support for SRC from Xtensa
This includes the basic declarations for SRC from Xtensa
support.

It adds the codec id, initializes the API member of
cadence_api with exported library function for SRC and
enables support for linking in the binary codec from Cadence.

All these for the purpose of using Sample Rate Converter
from Xtensa.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2021-10-05 15:38:44 +01:00
Iuliana Prodan be69f41bef drivers: imx: sdma: fix warning
Fix the following warning when building SOF with zephyr:
"warning: format '%x' expects argument of type 'unsigned int',
but argument 3 has type 'long unsigned int'".

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2021-10-05 15:13:26 +01:00
Kai Vehmanen 40484a87f2 topology1: correct misleading comments for priority/core
Comments for calls to PIPELINE_PCM_ADD and DAI_ADD describe parameters
in the same order they are passed to the macros. The only exception is
order of "priority" and "core", and this can be very misleading. In
most cases the actual current values for the two parameters are 0,
making it even easier to make a mistake when modifying them.

Fix the order in the comments to match the actual order in which the
parameters should be passed to PIPELINE_PCM_ADD and DAI_ADD.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2021-10-05 15:11:22 +01:00
Kai Vehmanen 9dfd2bd493 topology: intel: use 38.4Mhz MCLK for all Bluetooth use-cases
Updated guidance for BT hardware is to use 38.4Mhz MCLK for both
SCO and A2DP mode. This applies for all Intel platforms supporting
Bluetooth offload.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2021-10-05 15:05:25 +01:00
Allen-KH Cheng 5871d0f976 CODEOWNERS: add code owners for mt8195
Add code owners of mt8195 for mediatek platform.

Signed-off-by: YC Hung <yc.hung@mediatek.com>
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
2021-10-05 15:03:21 +01:00
Ranjani Sridharan b9656477f8 component: do no modify blob data size until new data is ready
If new blob data arrives while the component is active and using
the current blob data, we should not modify the current blob size
with the new size until the new data has been applied. So,
introduce a new field, new_data-size, that will hold the size
of the new blob until the new blob is applied.

While we're at this, also clean up setting the data_ready flag.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2021-10-04 11:45:51 +01:00
Allen-KH Cheng ebb71643b2 timer: mtk: fix cppcheck bug in mt8195 timer
cppcheck bug :
Redundant initialization for 'lowtimeout'
Because lowtimeout is overwritten in line 68.
'lowtimeout = ticks_set;'

Directlt remove hitimeout and lowtimeout.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
2021-10-04 11:41:10 +01:00
Allen-KH Cheng 29416bbd16 platform: mtk: fix wrong prefix windows name
change prefix windows name from
NUM_IMX_WINDOWS
to
NUM_MTK_WINDOWS

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
2021-10-04 11:39:55 +01:00
Iuliana Prodan 9f6c2e1136 zephyr: imx8m: enable second level interrupts handling
On i.MX8MP the DMA interrupts are routed via IRQ_STEER.
In order for this to work we need to:
- initialize cascade interrupts before any usage;
- make any second level interrupts handling go
through interrupt-irqsteer.c;

First level interrupt handling is used from
wrapper.c.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2021-10-04 10:34:26 +03:00