mirror of https://github.com/thesofproject/sof.git
lib: dma: Drop temporary variable use from dma.h and blank lines
The use of temporary variables in the header was introduced by commit1bb78a5cab
("dma: use platform_shared_commit()") When the platform_shared_commit() use is removed by commit580b9cf005
("memory: remove platform_shared_commit() as it's a NOP on all platforms.") The temporary variables remained for no reason. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
This commit is contained in:
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60ab692ce5
commit
76de2bb8d6
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@ -306,16 +306,12 @@ static inline void dma_channel_put(struct dma_chan_data *channel)
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static inline int dma_start(struct dma_chan_data *channel)
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{
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int ret = channel->dma->ops->start(channel);
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return ret;
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return channel->dma->ops->start(channel);
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}
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static inline int dma_stop(struct dma_chan_data *channel)
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{
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int ret = channel->dma->ops->stop(channel);
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return ret;
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return channel->dma->ops->stop(channel);
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}
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/** \defgroup sof_dma_copy_func static int dma_copy (struct dma_chan_data * channel, int bytes, uint32_t flags)
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@ -327,9 +323,7 @@ static inline int dma_stop(struct dma_chan_data *channel)
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static inline int dma_copy(struct dma_chan_data *channel, int bytes,
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uint32_t flags)
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{
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int ret = channel->dma->ops->copy(channel, bytes, flags);
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return ret;
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return channel->dma->ops->copy(channel, bytes, flags);
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}
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/** @} */
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@ -352,135 +346,97 @@ static inline int dma_release(struct dma_chan_data *channel)
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static inline int dma_status(struct dma_chan_data *channel,
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struct dma_chan_status *status, uint8_t direction)
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{
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int ret = channel->dma->ops->status(channel, status, direction);
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return ret;
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return channel->dma->ops->status(channel, status, direction);
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}
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static inline int dma_set_config(struct dma_chan_data *channel,
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struct dma_sg_config *config)
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{
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int ret = channel->dma->ops->set_config(channel, config);
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return ret;
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return channel->dma->ops->set_config(channel, config);
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}
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static inline int dma_pm_context_restore(struct dma *dma)
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{
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int ret = dma->ops->pm_context_restore(dma);
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return ret;
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return dma->ops->pm_context_restore(dma);
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}
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static inline int dma_pm_context_store(struct dma *dma)
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{
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int ret = dma->ops->pm_context_store(dma);
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return ret;
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return dma->ops->pm_context_store(dma);
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}
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static inline int dma_probe(struct dma *dma)
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{
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int ret = dma->ops->probe(dma);
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return ret;
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return dma->ops->probe(dma);
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}
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static inline int dma_remove(struct dma *dma)
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{
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int ret = dma->ops->remove(dma);
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return ret;
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return dma->ops->remove(dma);
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}
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static inline int dma_get_data_size(struct dma_chan_data *channel,
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uint32_t *avail, uint32_t *free)
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{
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int ret = channel->dma->ops->get_data_size(channel, avail, free);
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return ret;
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return channel->dma->ops->get_data_size(channel, avail, free);
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}
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static inline int dma_get_attribute(struct dma *dma, uint32_t type,
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uint32_t *value)
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{
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int ret = dma->ops->get_attribute(dma, type, value);
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return ret;
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return dma->ops->get_attribute(dma, type, value);
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}
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static inline int dma_interrupt(struct dma_chan_data *channel,
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enum dma_irq_cmd cmd)
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{
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int ret = channel->dma->ops->interrupt(channel, cmd);
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return ret;
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return channel->dma->ops->interrupt(channel, cmd);
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}
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/* DMA hardware register operations */
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static inline uint32_t dma_reg_read(struct dma *dma, uint32_t reg)
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{
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uint32_t val;
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val = io_reg_read(dma_base(dma) + reg);
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return val;
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return io_reg_read(dma_base(dma) + reg);
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}
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static inline uint16_t dma_reg_read16(struct dma *dma, uint32_t reg)
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{
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uint16_t val;
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val = io_reg_read16(dma_base(dma) + reg);
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return val;
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return io_reg_read16(dma_base(dma) + reg);
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}
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static inline void dma_reg_write(struct dma *dma, uint32_t reg, uint32_t value)
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{
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io_reg_write(dma_base(dma) + reg, value);
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}
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static inline void dma_reg_write16(struct dma *dma, uint32_t reg,
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uint16_t value)
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{
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io_reg_write16(dma_base(dma) + reg, value);
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}
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static inline void dma_reg_update_bits(struct dma *dma, uint32_t reg,
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uint32_t mask, uint32_t value)
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{
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io_reg_update_bits(dma_base(dma) + reg, mask, value);
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}
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static inline uint32_t dma_chan_reg_read(struct dma_chan_data *channel,
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uint32_t reg)
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{
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uint32_t val;
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val = io_reg_read(dma_chan_base(channel->dma, channel->index) + reg);
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return val;
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return io_reg_read(dma_chan_base(channel->dma, channel->index) + reg);
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}
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static inline uint16_t dma_chan_reg_read16(struct dma_chan_data *channel,
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uint32_t reg)
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{
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uint16_t val;
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val = io_reg_read16(dma_chan_base(channel->dma, channel->index) + reg);
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return val;
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return io_reg_read16(dma_chan_base(channel->dma, channel->index) + reg);
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}
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static inline void dma_chan_reg_write(struct dma_chan_data *channel,
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uint32_t reg, uint32_t value)
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{
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io_reg_write(dma_chan_base(channel->dma, channel->index) + reg, value);
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}
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static inline void dma_chan_reg_write16(struct dma_chan_data *channel,
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@ -488,7 +444,6 @@ static inline void dma_chan_reg_write16(struct dma_chan_data *channel,
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{
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io_reg_write16(dma_chan_base(channel->dma, channel->index) + reg,
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value);
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}
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static inline void dma_chan_reg_update_bits(struct dma_chan_data *channel,
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@ -497,7 +452,6 @@ static inline void dma_chan_reg_update_bits(struct dma_chan_data *channel,
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{
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io_reg_update_bits(dma_chan_base(channel->dma, channel->index) + reg,
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mask, value);
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}
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static inline void dma_chan_reg_update_bits16(struct dma_chan_data *channel,
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@ -506,14 +460,11 @@ static inline void dma_chan_reg_update_bits16(struct dma_chan_data *channel,
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{
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io_reg_update_bits16(dma_chan_base(channel->dma, channel->index) + reg,
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mask, value);
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}
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static inline bool dma_is_scheduling_source(struct dma_chan_data *channel)
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{
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bool ret = channel->is_scheduling_source;
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return ret;
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return channel->is_scheduling_source;
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}
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static inline void dma_sg_init(struct dma_sg_elem_array *ea)
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