Includes following rimage commits:
4fb9fe0057 config: lnl+mtl: fix length of ADSP.man CSE manifest
c809af8168 Config: Add crossover component for TGL and TGL-H cAVS platforms
8c8440070a style: trailing whitespace is the root of all evil
d20f1d8a85 actions: remove travis
af9a2fe58f Config: Fix comment typo for EQ FIR module
b8ee1aa8f6 Config: Add DRC component to TGL, TGL-H, MTL, LNL
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Contains 2211 commits, including following directly affecting
SOF targets:
ab0ed577111b mm: intel_adsp_tlb: Handle address space conversion warnings
823e6b70d240 arch: xtensa: Implement arch_float_enable&disable
be779f2a6195 intel_adsp: hda: fix usage of FIFORDY bit
498f294b2720 west: update sof ref in manifest
42ca64d60cd2 tests: dma_sg: intel_adsp_ace15 specific config
0e373019d65e dma: intel_adsp_gpdma: Unmask interrupt on ACE
6e66efa08871 soc: intel_adsp_ace15: Include stdint.h
250748bfe671 intel_adsp: Add option about switch off hpsram
b4293ec026c4 dts: xtensa: nxp: add nodes for IPC
1295283a8a72 soc: xtensa: nxp: add resource_table section in linker script
e6d89268572d xtensa: set no optimization for arch_cpu_idle() with xt-clang
a458d0443a91 xtensa: allow arch-specific arch_spin_relax() with more NOPs
f60306193844 soc: xtensa: intel_adsp: cavs: fix PM hooks guards
385ad46a39ca boards/xtensa: Skip cleaning intermediate binaries up
1c0c2a095b48 drivers: intel_adsp_gpdma: Fix release ownership
e55fb88bcbe7 soc: intel_adsp/ace: update clock rate
35e8e6fa03fa soc/xtensa/nxp_adsp/CMakeLists.txt: use new WEST_SIGN_OPTS variable
c35d97534fd1 include: util_internal: add Z_SPARSE_LIST_{ODD|EVEN}_NUMBERS
25c6553edde5 soc: intel_adsp/ace: use functions to do CPU power control
3764814831a7 intel_adsp: boot: d3: hp sram reinit
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Pull in following rimage changes:
aa0ac9eae6 rimage.c: fix bug where -p requires a new
and ignored parameter
Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Pull in following rimage changes:
48777207f5 (HEAD) config: add vangogh toml file to support vangogh build
089157d461 Config: Add Aria module to tgl-cavs.toml and tgl-h-cavs.toml
Signed-off-by: SaiSurya Ch <saisurya.chakkaveeravenkatanaga@amd.com>
After exiting D3 state if IMR context save is enabled, IDC interrupt
must be re-enabled again for all cores. It fixes multicore CI test
issue.
431108d89e175: intel_adsp: ace: Restore IDC interrupt on D3 exit
Signed-off-by: Rander Wang <rander.wang@intel.com>
During last changes in Zephyr that implemented power transition for the
IPC Device, signature of the intel_adsp_ipc_send_message had changed
and now returns negative int error codes (previously bool on success).
Updated single function reference in SOF ipc_platform_send_msg().
Implementation had not changed as the function may return only
-EBUSY error code until the Zephyr Device Power Management option
is disabled.
Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Zepych update: total of 228 commits.
Changes include:
- build LNL with Zephyr SDK,
- MMU initial implementation,
- check for pending ack in intel_adsp_ipc_is_complete.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This update is needed to include Zephyr specific patches required for
building SOF on i.MX platforms with Xtensa toolchain.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
Informing the primary core that the Idle thread on secondary core is
ready. During the D3 exit flow thread is not initialize again, but
restored from previously saved context.
This patch includes also zephyr version update to aba3b12e31 (total 15
commits). Changes related to intel_adsp contain refactor and fixes for
ACE secondary cores power flows.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Use zephyr cache APIs instead of xtensa specific ones.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Start using zephyr pm_runtime, clk and dma glue code in cavs25 native
drivers build. Move the files from ace/lib into zephyr/lib.
Also update west.yaml to related zephyr commit as power related
files have been moved to zephyr side.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
Total of 1128 commits, including following related to
dma-dw/intel_adsp/sparse/dmic/xtensa:
e40859f78712 Revert "dma: dw: Do not program SAR/DAR and CTL_HI/LO when using HW LLI"
7a85983ebcf2 xtensa: remove ELF section address rewriting
b32b321f502a dma: dw: Poll to check for channel disable with timeout
6226f9e6e44f dma: dw: fix the return value check
08d9efb202cc dma: dw: Do not program SAR/DAR and CTL_HI/LO when using HW LLI
045c68673491 dma: dw: Add a debug utility function
bd705e68b048 soc: xtensa: esp32: increase shared memory region
9854c915ffdf intel_adsp: cpu init refactor
9d5c21d58003 dts: xtensa: nxp: remove unused include
68c1cafb411e intel_adsp: dts: ace: lower case 71C00 to fix DTC warning
a8c0123d3c54 intel_adsp: cmake: add_custom_command(.mod) to fix incremental build
b00c63e7640c footprint: ci: Remove audio SOF samples
1efaa94bc64b drivers: audio: dmic_nrfx_pdm: drop -pin support
8ef2cd20d90a Drivers: DAI: Intel: DMIC: Shorten unmute ramp time
eead89e7f22d soc: intel_adsp: cavstool.py: simplify asyncio.run() call
cdae0bb7596e boards: intel_adsp_ace15_mtpm uses xcc-clang toolchain for twister
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Upgrade to the present rimage upstream version to fix tgl building
with Zephyr main branch head.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Pull in following rimage changes:
d32db50 mtl: add Aria module to extended manifest
5bc2010 rimage: fix build error
35bc644 mtl: add eq-iir and fir support
6fad356 rimage: Removed hash context from image structure
6c7a151 hash: Remove old hash functions
d258ea2 manifest: pkcs1_5: Use new hash functions
2bd8be3 hash: New hash functions
93c5e8b misc_utils: Move byte_swap function to new misc_utils.c file
9ce1cc8 ext_manifest: Fix fw_ext_man_cavs_header version
a4ca53c toml_utils: Adding support for decimal numbers in hex parser
5ebbd65 rimage: use hex number
36c0c90 elf: Use the get_file_size function
98c7f7b manifest: Use the get_file_size function
6a64cb9 file_utils: Add a new get_file_size function
055ea7e file_utils: manifest: ext_manifest: Add new create_file_name function
fed69d4 toml_utils: adsp_config: Moved generic parser functions to toml_utils
0931d9c main: heap_adsp release fix
3aa199f config: mtl: set init_config for micsel
d48ad6b adsp_config: add dump for init_config
ffd0542 adsp_config: make the default value zero for init_config
cb9c880 config: tgl-cavs: add kpb, selector and kd support
bf23b5e config: mtl: set KDTEST module_type to 8
Signed-off-by: Keqiao Zhang <keqiao.zhang@intel.com>
Includes:
- rename of xcc-clang compiler to xt-clang
- updates in C++ headers in zephyr/sys/util.h that require C++14
standard now.
Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Start using new version of dai_config_get where config struct is given
as pointer argument.
Update west.yaml to point to correct zephyr version for this change.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
Includes patches to dai-zephyr.c to adapt to DMA interface
change for DW/HDDMA drivers.
Total of 1168 commits, including following related to
intel_adsp/sparse/dmic/xtensa:
8f5bcb2e76c3 intel_adsp: ace: fix linker script for xcc-clang compiler
18ce85c20130 tests: intel_adsp: ssp: fix dma data sizes
60a20471b561 intel_adsp: ace: enable interrupts for secondary core
6045eed2f361 intel_adsp: ace: enable core power gating
e1dbc2efef50 intel_adsp: ace: add core power off step
a99b073392fc intel_adsp: ace: d3 exit update
156c7cd21759 intel_adsp: bbzero/bmemcpy with picolibc fix
60196ca1126a cmake: sparse: deprecate old sparse support
91902c5fd4db cmake: add sparse support to the new SCA infrastructure
a684714d5c82 soc: intel_adsp: Correct HDA parameter docstrings
db495a5ebee3 xtensa: stop execution under simulator for double exception
8ff88346955b xtensa: sparse: fix address space mismatch
7965fd2b4a8a samples/boards/intel_adsp: Make sample work with twister
422250d3b183 mm: intel_adsp_mtl_tlb: suppress sparse address space warnings
618a478ded70 xtensa: fix sparse warning when converting to uncache pointer
8b391dc43841 drivers: audio: dmic_nrfx_pdm: Fix a race condition in the driver
8794de2934f7 intel_adsp: soc: ace: Add communication widget driver
a9b3d935500c intel_adsp: dai: Add support for ALH up to 16 nodes
837432506269 drivers: dai: intel: dmic: don't use assert for error handling
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Pull in following rimage changes:
3863e94fa5 Don't convert ROM addresses to cached aliases
1e0a85b44a config:tgl/tglh: Do not set cached/uncached address aliases
9b507ecc82 config: set cached and uncached aliases for affected platforms
def9d51d7d Fix regression - make default return code an error
d48ae7aada config: mtl: Set init_config for smart amp
b5d762290f config: tgl-cavs: set init_config for smart test
15ea48177a src: adsp_config: Use reserved bits for module init config
ec649f37d6 Convert all ELF addresses to cached for calculations
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
DFDSPBRCP register have been renamed to DSPCS in Zephyrs commit
21f278c04bc258eb344ac5b2123b49d760b5b71d. This commit changes the
references from old to new name.
Changed zephyr revision to d9c4ec31fc49e7eef3c8c3b0d07827cc04e6efee
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Updates Zephyr to current top: e4fcb32451c587a3e4ba7f8bf3fc602b16f9652b.
This is to enable ALH multi-gateway feature. The required Zephyr commit
for Intel ADSP MTL is:
https://github.com/zephyrproject-rtos/zephyr/pull/53066
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
upgrade rimage to
ba8534bb23ba8534bb23 Fix bitmap according to the IMR type
f3eef3cfb6 Fix IMR type parsing
bdba8259fe Add a command line option to set an Intel-specific PV bit
1c48208850 config: tgl-cavs: add smart amp test module config
082b6261c9 config: Add mt8188.toml
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
Zepych update: total of 73 commits.
Changes include adding power domains to DMA interfaces and allowing to
skip context save during d3.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Total of 440 commits, including following related to
intel_adsp/sparse/dmic/xtensa:
603cc2704579 dma: Add max block count attribute
2c162449eb4c xtensa: linker: Fix#52539 by updating the linker scripts
2dd4cbc75592 dts: xtensa: intel: update cavs25_tgph to match cavs25
Link: https://github.com/thesofproject/sof/issues/6710
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Updated zephyr to the latest version with
the necessary patches
a requried kconfig option is added because of
https://github.com/zephyrproject-rtos/zephyr/pull/51738
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
The intent was to stop people from cloning the sof manifest git repo
under a different name than "sof". It did not work, I had to help
multiple people who did it anyway.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
upgrade rimage to
3ee717eebc3ee717eebc probe: mtl.toml invaliv probe type
1f4a36e21f mux: fix module type
dcfd11bc4d mux: add mux cfg to list of modules
d957e0368b rimage: make ace15 signing to support openssl3
a1b6e6db33 manifest: add fw_ver_micro to manifest
fb28357912 config: mtl: add probe module
Signed-off-by: Kwasowiec, Fabiola <fabiola.kwasowiec@intel.com>
Trying avoid out-of-sync situations like commit a3b3c525d1 ("west:
update to newer rimage baseline").
Also explain why sof cannot be cloned as "sof2"
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Upgrade Zephyr from 0956647aaf6bd2b1e840adcc86db503f274d84a9 to
ed661a6c6909b338035b026cfc101ddda65ab8eb (1020 commits, including
441 since v3.2.0 tag).
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Update Zephyr to 0956647aaf6bd2b1e840adcc86db503f274d84a9 (3.2.0-rc1
plus a few fixes merged to upstreamed after the tag).
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Update zephyr to commit dcda3eab8df7 ("tests: net: socket: tcp: move to
new ztest API").
Needed to bring in support for Intel mtrace logging backend.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Update zephyr to commit 8e55e59c5917 ('arch: introduce config DCLS').
Fixes build errors due to missing core-isa.h with tgl Intel target with
gcc build chain.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Kai Vehmanen