Commit Graph

6836 Commits

Author SHA1 Message Date
Bud Liviu-Alexandru b40a2f7d36 docker: Add support for i.MX8ULP platform
This commit adds support for building i.MX8ULP toolchain support.

Signed-off-by: Bud Liviu-Alexandru <budliviu@gmail.com>
2021-08-06 14:39:52 +01:00
Guennadi Liakhovetski ceabf319e1 compile: use __attribute__((fallthrough)) with GCC
Fix compiler warning by using the "fallthrough" attribute with GCC
as well.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2021-08-06 14:38:05 +01:00
Ranjani Sridharan 5a42c023d2 topology1: make all cavs nocodec topologies dynamic
All cAVS platforms can use dynamic pipelines with nocodec topology.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2021-08-05 22:45:35 +01:00
Anas Nashif d486a9ff98 kconfig: allow SOF Kconfig to be included in other projects
When the SOF Kconfig is included in other projects, the main menu should
not be that of SOF, rather it should be of the project including SOF.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-08-04 12:34:39 +01:00
Rander Wang 1f641729cd ipc4: add ipc4 message support
There are two types of ipc4 message: global message and module message.
Ipc message is first decoded in handler.c and processed with the help
of helper.c to deal with pipeline message and module message.
Pipeline and Module messages are converted to sof pipeline and
component message.

Ipc4 pipeline message <------> ipc3 pipeline message
RUNNING       <------->   TRIGGER START
INIT + PAUSED <------->   PIPELINE COMPLETE
PAUSED        <------->   TRIGER_PAUSE
RESET         <------->   TRIGER_STOP + RESET
EOS           <------->   TRIGER_RELEASE

Ipc4 Module message <------> ipc3 module message
init module             <------->   create component
bind modules            <------->   connect components
module set_large_config <------->   component cmd
delete module           <------->   free component

There is no buffer module in ipc4 design and FW manages buffer for each
module while buffer component is defined by topology and create by ipc
message for ipc3 design. For ipc4 path, FW will create buffer when two
modules are bound since the buffer format can be gathered from source
& sink modules and the buffer can be connected to both modules.

Currently only part of ipc4 messages are processed and others will be done
in future.

Signed-off-by: Rander Wang <rander.wang@intel.com>
2021-08-03 15:17:37 +01:00
Rander Wang 23c0839e4a ipc: share some utility functions for ipc4 path
Ipc3 & Ipc4 will share some component operations.

Signed-off-by: Rander Wang <rander.wang@intel.com>
2021-08-03 15:17:37 +01:00
Paul Olaru cb49c4611c codecs: cadence: vorbis: Add support for linking in the Vorbis decoder
This commit enables support for linking in the binary codec from Cadence
for the purpose of decoding Vorbis content.

Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
2021-08-03 14:43:25 +01:00
Paul Olaru f10430f8c7 codecs: cadence: vorbis: Add external Cadence header for Vorbis support
This header is third party and contains expected definitions for the
codec adapter support to work.

Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
2021-08-03 14:43:25 +01:00
Paul Olaru 175fdf736f codecs: cadence: vorbis: Add support for Vorbis in code
This includes the basic declarations for Vorbis support.

Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
2021-08-03 14:43:25 +01:00
Daniel Baluta 0d14a64ea6 topology1: i.MX: Add topology to demonstrate EQ FIR component
This enables EQ component using FIR filter for i.MX8QM/i.MX8QXP/i.MX8MP.

Usage:

   $  amixer -Dhw:1 controls | grep EQ
    numid=44,iface=MIXER,name='EQFIR1.0 eqfir_coef_1'

  $ ./sof-ctl -Dhw:1 -n 44 -s sof/tools/ctl/eq_fir_loudness.txt

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2021-08-03 13:34:11 +01:00
Daniel Baluta ffe4d594ae topology1: pipe-eq-fir-volume: Fix ControlBytes section name
ControlBytes section name is given by DEF_EQFIR_COEF macro.
Otherwise, using pipe-eq-fir-volume-playback.m4 in a topology results in
a compilation error.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2021-08-03 13:34:11 +01:00
Zhang Peng 1f208c376e drivers: imx: edma: Fix play error in second time
No need to write to register MUX when it already has value. Second
write option can't set value and clear register to zero.

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2021-08-03 13:31:54 +01:00
Zhang Peng d950c05354 platform: Kconfig: Add XT for imx8ulp config
At commit d337c0a9ba we add XT as prefix for option, add it for
imx8ulp options.

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2021-08-03 12:37:50 +01:00
Marcin Rajwa b604644c65 memory: add timeout into polling loops
This patch adds timeout condition into all loops
that monitor power status registers.

Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
2021-08-03 11:46:45 +01:00
Marcin Rajwa 0d35bf84f3 memory: add support for L1 DRAM
This patch adds support for L1 DRAM memory. If this
memory is available bootloader will try to power up
as many banks of L1 DRAM memory as the platform supports.

Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
2021-08-03 11:46:45 +01:00
Marcin Rajwa 631567d1dd memory: change macro name
This changes the name of MEMORY_POWER_DOWN_DELAY to MEMORY_POWER_CHANGE_DELAY
as we use it in all power change cases and not only when power gating.

Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
2021-08-03 11:46:45 +01:00
Marcin Rajwa bbbdf5e00e memory: add kconfig fields for L1 DRAM
This patch adds fields in kconfig for L1 DRAM
memory support.

Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
2021-08-03 11:46:45 +01:00
Daniel Baluta c26dfff3bf topology1: imx8ulp: Set min_channels to 1
On i.MX8ULP SAI5 is connected to BT interface that only supports 1
channel.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2021-08-03 11:44:19 +03:00
Daniel Baluta e2fc7082e1 topology1: Add CHANNELS_MIN macro for playback pipeline
Add macro to allow configuration of min channels in PCM_CAPABILITIES.
The default behavior is not changed.

So far min channels was hardcoded to 2 for pipe-volume-playback but we
need mono for i.MX8ULP configuration.

Notice that we need to use the local macro TCHANNELS_MIN because we
don't want to modify the value of CHANNELS_MIN macro outside
of sof/pipe-volume-playback.m4 file.

Doing so will cause unpredictable behavior for next pipeline
definitions.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2021-08-02 22:08:07 +01:00
Guennadi Liakhovetski e8b2d436c9 clock: (cosmetic) make frequency tables and sources static const
Make platform_cpu_freq[], platform_ssp_freq[] and
platform_ssp_freq_sources[] arrays static and constant on multiple
platforms.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2021-08-02 21:54:37 +01:00
Zhang Peng ac3c5eb76f topology: Add sof-imx8ulp-btsco.m4 for imx8ulp
IMX8ULP pipeline is HOST-->VOLUME-->DAI(sai)-->CODEC(bluetooth).

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2021-08-02 21:42:31 +01:00
Zhang Peng dc65471460 drivers: imx: edma: Correct burst_elems size
edma only copy 32bit data before, burst_elems should be adjust
according to src width.

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2021-08-02 21:42:31 +01:00
Zhang Peng 7f31195943 drivers: imx: sai: Config hw param channel is 1 for 8ulp
The default hw param channel is 2, this will cause dai_verify_params
error when set channel is 1 on imx8ulp. Add special config for imx8ulp.

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2021-08-02 21:42:31 +01:00
Zhang Peng e1833026fe include: drivers: sai: Add special fclk for imx8ulp
We expect fclk is 16KHz on imx8ulp, and now it's 48KHz.According to
bclk = mclk / ((DIV + 1) * 2), set SAI_CLOCK_DIV is 0x17.
Also expect mono pcm, then set SAI_TDM_SLOTS is 1

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2021-08-02 21:42:31 +01:00
Zhang Peng b02655ad75 include: drivers: sai: Set SAI_FIFO_WORD_SIZE for imx8ulp
SAI has transmitter/receiver watermark is 16 on imx8ulp, then set
SAI_FIFO_WORD_SIZE 16.

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2021-08-02 21:42:31 +01:00
Zhang Peng 28daab8987 drivers: imx: sai: Config one channel and 16bit sywd for IMX8ULP
In order to work well with bluetooth, we expect mono channel and 16bit
pcm data, then config 16bit sywd one channel for imx8ulp.

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2021-08-02 21:42:31 +01:00
Zhang Peng 4fe6b5c151 drivers: imx: sai: Config tx0 and rx3 for IMX8ULP
We expect to use tx0 for playback and rx3 for capture on IMX8ULP.

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2021-08-02 21:42:31 +01:00
Zhang Peng 1644e1d92f platform: imx8ulp: dai: Add handshake for sai
Add handshake for sai, config edma channel0 for playback, channel1
for capture.

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2021-08-02 21:42:31 +01:00
Zhang Peng fb1651795e edma: Add support for i.MX8ULP DMA channel mapping
i.MX8ULP uses a MUX to map DMA channels to IP. We map the SAI channels
for now and need to find a more generic approach to select any IP channels.

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2021-08-02 21:42:31 +01:00
Zhang Peng 850300456f dma: imx8ulp: Add interrupts for imx8ulp EDMA
On i.MX8ULP are not bound to any IP. We will use first 2 EDMA
channels for our SAI IP.

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2021-08-02 21:42:31 +01:00
Rander Wang d38c3c3912 topology2: add hda volume pipeline support for ipc4
This is for generic hda machine driver. Dmic is
not included since it is been developing. The gain
module in ipc4 has the function of volume component
in ipc3 and we use it to control volume.

Signed-off-by: Rander Wang <rander.wang@intel.com>
2021-07-30 22:44:31 +01:00
Rander Wang 2ebe36aedd topology2: add volume support for ipc4
Volume is supported by gain module in ipc4. We need
to set curve_type, curve_duration and init_val for
this module.

Signed-off-by: Rander Wang <rander.wang@intel.com>
2021-07-30 22:44:31 +01:00
Rander Wang 884bfdf125 topology2.0: add some basic class definitions
Signed-off-by: Ranjani Sridharan <ranjani.sidharan@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
2021-07-30 22:44:31 +01:00
Pierre-Louis Bossart 6daab998e6 Revert "pipeline: trigger START from the task context"
This reverts commit 9a7a5ce17d.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2021-07-30 15:25:09 -05:00
Pierre-Louis Bossart 158bb9e454 Revert "trace: move CONFIG_TRACEM implementation up a couple levels"
This reverts commit 0def905630.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2021-07-30 15:25:09 -05:00
Pierre-Louis Bossart 9410e84de2 Revert "trace: add _log_nodict() and enable DMA trace for Zephyr"
This reverts commit 57ee04f2d9.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2021-07-30 15:25:09 -05:00
Daniel Baluta 53718867df topology: imx8mp: Add compress decoding pipeline for i.MX8MP with aac/mp3 codecs
Add topology to support compress playback for MP3/AAC
on i.MX8MP with wm8960 codec.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2021-07-29 16:07:28 +03:00
Daniel Baluta 64be6a6578 topology: imx8: Add compress decoding pipeline for i.MX8/i.MX8X with aac/mp3 codecs
Add topology to support compress playback for MP3/AAC on i.MX8/i.MX8X
with wm8960 codec.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2021-07-29 16:07:28 +03:00
Guennadi Liakhovetski 1e037398a5 zephyr: ll-domain: set .next_tick into the future
.next_tick is updated on each timer run to the time of the next run.
Instead the current version sometimes only updates it to the current
time. Fix the update condition.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2021-07-28 20:49:48 +01:00
Zhang Peng 45ec1de686 platform: Add build support for i.MX8ULP
This integrates i.MX8ULP build into SOF.

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2021-07-28 14:36:32 +03:00
Zhang Peng 324fb772a3 configs: Add default config for i.MX8ULP
This enables i.MX8ULP platform.

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2021-07-28 14:36:32 +03:00
Zhang Peng 42716054c3 platform: imx8ulp : Add xtensa headers
This files are provided by Cadence and we use them as they are.

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2021-07-28 14:36:32 +03:00
Zhang Peng 1707026ba2 platform: Add support for i.MX8ULP platform
i.MX8ULP platform integrates HIFI4 DSP running at 528MHz.

This patch adds support for platform drivers and general
platforminitialization.

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2021-07-28 14:36:32 +03:00
Zhang Peng 8e068225f4 drivers: imx: Add new file interrupt-generic.c
Add the file for the platform without irqsteer. Now if the platform
have irqsteer we choose interrupt-irqsteer.c, if not then we choose
interrupt-generic.c

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2021-07-28 14:36:32 +03:00
Zhang Peng a2cf957af4 drivers: imx: ipc: Make MU support imx8ulp
Make mu implementation generic. imx8ulp platform has a new version
of mu, then update mu for preparing to support imx8ulp.

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2021-07-28 14:36:32 +03:00
Guennadi Liakhovetski 9a7a5ce17d pipeline: trigger START from the task context
When the firmware receives a START or RELEASE IPC message, it
immediately triggers all involved components, which starts DMA.
Then it schedules the pipeline task, but since the scheduler can be
already running at that time, the task might be scheduled when DMA
data isn't available yet or has already overflowed. To fix this
change the control flow to also trigger all components from the task
during its first run. Actual data processing then begins with the
next period. Note, that this is currently only possible with
pipelines, using timer-based scheduling. Pipelines, using DMA
interrupts for scheduling are unaffected.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2021-07-27 14:56:24 +01:00
Guennadi Liakhovetski 886b7ee403 pipeline: (cosmetic) use bool type, adjust line lengths
Use bool type for boolean flags, split some too long lines, merge
some needlessly split lines.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2021-07-27 14:56:24 +01:00
Guennadi Liakhovetski e879e954ad pipeline: (cosmetic) simplify pipeline_task_init()
pipeline_task_init() is always called with pipeline_task as its last
parameter. Remove the parameter and use the function explicitly.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2021-07-27 14:56:24 +01:00
Iuliana Prodan 6556933e83 xtensa-build-zephyr: add imx8 platform
Add imx8 platform for local testing.

TODO: Update xtensa-build-zephyr.sh when Zephyr repo
is updated with imx8 support.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2021-07-27 14:43:44 +01:00
Iuliana Prodan 214518edea zephyr: wrapper: add notifier_register(ipc_send_queued_msg) for SOF_SCHEDULE_LL_DMA
In XTOS SOF, ipc_send_queued_msg() is run by task_main_primary_core().
In Zephyr we need to schedule ipc_send_queued_msg() using a notifier
triggered by the periodic ll_scheduler.
This is similar to commit c194125b83 ("zephyr:
add notifier_register(ipc_send_queued_msg) in task_main_start()")

For i.MX we need to use this temporary fix for SOF_SCHEDULE_LL_DMA, also.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2021-07-27 14:43:44 +01:00