Not all devices have 4 cores, some only have 2 and even APL/GLK is
currently limited to a single core.
For now we still use a single core for all topologies, we will enable
multi-core in a follow-up patch.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Prepare for reuse across all platforms. For now this still uses
single-core.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
We first want to enable the simplified topologies, then multi-core
then dynamic pipelines. The latter two cases will be handled in
follow-up patches.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
This memory is already owned and initialized by the OS under Zephyr
(and in many cases already holds live output!), don't touch it.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Print out the target_core value when timed out during
idc_wait_in_blocking_mode(), which is useful for debugging.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
After first compress play run init_done is initialized with 1 and it
keeps this value as no one resets it.
This causes subsequent compress play to miss codec process init phase
and this causes decoding to fail.
With this change multiple cplay runs work fine!
Notice that cadence_codec_reset calls cadence_codec_init and thus resets
init_done flag.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
There is no rt1308 on the TGL-H-RVP platform, need to add a topology
file with only rt711 to enable soundwire on the TGL-H-RVP platform.
The patch of enable soundwire on the TGL-H-RVP platform has been
merged into the thesofproject/linux.
Signed-off-by: Gongjun Song <gongjun.song@intel.com>
Remove the addition of DAPM routes for virtual widgets.
These are not needed for suppressing errors with legacy
machine drivers. Just adding the virtual widget is enough.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Avoid "goto"s as much as possible, the only acceptable case is
jumping to a function cleanup block. Also unify trace prints.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
The walk context is passed in by the caller and not shared. The pipeline
states are locked by IPC.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
The UpExtreme HAT connector with the SoundWire,
I2S, DMIC mixed mode exposes the following pins
DMIC_DATA0: input: HAT PIN 8
DMIC_CLK: output: HAT PIN 26
IS2_MCLK: output: HAT PIN 16
I2S1_SCLK: output: HAT PIN 32
I2S1_SFRM: output: HAT PIN 10
I2S1_TXD: output: HAT PIN 24
I2S1_RXD: input: HAT PIN 18
Let's use core3 for DMIC, core2 for SSP0, core1 for SSP1 and core0 for
SSP2.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Add some pipeline classes for volume playback/capture, passthrough
capture and eq capture.
Each of these classes include the pipeline widget objects, connections
between pipeline widgets and pipeline attribute definitions
For ex: A volume playback pipeline can be instanted as follows:
Object.Pipeline.pipeline-volume-playback."2" {
channels 2
rate 48000
index 5
format "s32le"
}
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
In preparation for Topology2.0, move the current topology files
to the topology1 folder and once the 1.0 topologies are
built copy them to the /sof/tools/build-tools/topology folder.
When Topology2.0 topologies come along, they will be built into
the topology2 folder and the 2.0 binaries will be copied over
the 1.0 binaries.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
For speaker pipeline, we want to deploy DRC/EQ for partial TGL device
like Eldrid. The definition flag DRC_EQ is added to make the choice of
adopting the playback pipeline with DRC/EQ.
Signed-off-by: Pin-chih Lin <johnylin@google.com>
The get_drv() call currently disables IRQs as the driver list is never
manipulated in IRQ context.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Previously the gain ramp updates were executed in core 0 only even
if rest of driver was executed in other core. It caused issues with
driver state variables in cached memory.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch collects the global DMIC driver parameters into single
struct. The pointer global in every DMIC DAI instance points into
the same data. All access from functions happens via the pointer
that simplifies the next step to add NHLT binary data configuration
for the driver.
The previous dmic_prm[] is no more allocated dynamically since the
single data structure is fixed size and not large. It simplifies the
driver code that handles the multiple ownership.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Add flag SOF_IPC_INFO_D3_PERSISTENT to inform host driver if the IMR
restore feature is supported to the fw_ready message, then the host
driver can decide whether to choose it or not.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Invoke platform_context_save() routine to perform platform specific
suspending stuff, before handling the CTX_SAVE IPC.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
To enable the feature that resuming from IMR, we need to configure IMR
layout with correct magic number and IMR restore vector, in the
platform_context_save() routine.
This is harmless even the driver want to re-downloading FW at resuming
stage, sending the FW_PURGE IPC from the host side will ask the ROM code
to omit these IMR restoring stuff.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Add a platform_context_save() routine to all platforms, which can be used
to perform any platform specific stuff during suspending the DSPs.
Initialize all these routines to be do nothing.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Remove the duplicate SectionData when multiple EQ's use the
same filter coefficients. There is no change in the topology
binary generated with just one SectionData instead of multiple
ones.
But this will help clean up the conf file so that converting to
topology2.0 will become easier as the name tells me which
coefficients to include.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
The pipeline widget can be instantiated within a pipeline class as:
Object.Widget.pipeline."N" {
index 1
time_domain "timer"
period 1000
}
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Add a route class that will be used for creating DAPM routes
between widgets. A route can be between 2 widgets or between a
widget and pipeline endpoint as follows:
Object.Base.route."N" {
source "dai.SSP.1.dai.capture"
sink "buffer.0.1"
}
Object.Base.route."N" {
source "buffer.2.1"
sink "pga.2.0"
}
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Add the volume and switch mixer control objects for the
PGA class. The mixers will be added to the PGA widget
if the pga widget is instantiated with names for each
of the mixers as follows:
Object.Widget.pga.0 {
Object.Control.mixer.1 {
name "1 Master Capture Volume"
}
Object.Control.mixer.2 {
name "Capture Switch"
}
}
If the name is only provided for one of the controls, only
that control will be added to the widget when building topology.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Add the class definition for a mixer control.
A mixer control can be instantiated as follows:
Object.Control.mixer."0" {
Object.Base.channel."fr" {
shift 0
}
Object.Base.channel."fl" {}
Object.Base.tlv."vtlv_m64s2" {
Object.scale."0" {
mute 1
}
}
Object.ops."ctl" {
info "volsw"
get 256
put 256
}
}
Also add the other commonly used class definitions that
will be used to instantiate the mixer object such as,
channel, TLV, ops, scale etc.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Enabled CROSSOVER, DRC, and MULTIBAND_DRC component configs to
tigerlake_chrome.config in order to deploy DRC/EQ on speaker pipeline
on partial TGL device, e.g. Eldrid.
Signed-off-by: Pin-chih Lin <johnylin@google.com>
DRC_MAX_PRE_DELAY_FRAMES determines the length of pre-delay frame
buffers which are allocated runtime on DRC setup.
Use rballoc instead of rzalloc to allocate frame buffers.
The default value 512 is suggested by inference to avoid memory waste
and provide reasonable length for pre-delay frames.
Signed-off-by: Pin-chih Lin <johnylin@google.com>
Add the class definition for ASRC widget, it can be
instantiated as follows:
Object.Widget.asrc."N" {
period_sink_count 2
period_source_count 2
format "s24le"
rate_out 48000
asynchronous_mode 1
operation_mode 0
}
Where N is the unique instance number for asrc widget
within the same alsaconf node.
Signed-off-by: Chao Song <chao.song@linux.intel.com>
Add the class definition for SRC widget, it can be
instantiated as follows:
Object.Widget.src."N" {
period_sink_count 2
period_source_count 2
format "s24le"
rate_out 48000
}
Where N is the unique instance number for src widget
within the same alsaconf node.
Signed-off-by: Chao Song <chao.song@linux.intel.com>
Add the class definition for PGA widget. It can be
instantiated as follows:
Object.Widget.pga."N" {
format s24le
index 0
period_sink_count 2
period_source_count 2
}
Where N is the unique instance number for pga widget in the same
alsaconf node.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Pierre-Louis Bossart