Commit Graph

69 Commits

Author SHA1 Message Date
Kai Vehmanen 267d069251 west.yml: update Zephyr to ffd716b4a214
Update Zephyr to bring in total of 290 commits, including
the following related to SOF targets:

0ebeca2eb7d0 intel_adsp: ace: add firmware loading tool
0e73c225bb54 drivers: ssp: Reverted CPA check condition

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-12-12 10:33:56 +02:00
Daniel Baluta a41f26d085 west.yml: update Zephyr to efc32081893d
Update Zephyr to pull in imx8ulp support. This includes following zephyr
commits:

- cfb68f827202 ("boards: xtensa: adsp: add support for imx8ulp board")
- a9a0c28282c3 ("dts/xtensa/nxp: Add dtsi for imx8ulp")
- 4b33c65f7108 ("soc: xtensa: adsp: add support for NXP ADSP for i.MX8ULP")
- efc32081893d ("west: sign: add support for NXP i.MX8ULP board")

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2023-12-07 21:35:26 +02:00
Rander Wang f1ee910fc2 west.yml: update Zephyr to efc32081893d
Update Zephyr to bring in following Zephyr commit:
efc32081893d soc: intel_adsp: cavs: mask idc interrupt
before halting cpu

Link: https://github.com/thesofproject/sof/issues/8492

Signed-off-by: Rander Wang <rander.wang@intel.com>
2023-11-24 14:06:13 +00:00
Kai Vehmanen 8cdae1334e west.yml: update Zephyr to 063ce9caf54f
Update Zephyr to bring in following Zephyr commit:

155f866ecc2c dts: intel_adsp: ace remove dw watchdog

Link: https://github.com/thesofproject/sof/issues/8418
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-11-17 12:55:36 +02:00
Laurentiu Mihalcea 4da19a9c1d manifest: west.yml: Bump up Zephyr revision
Bump up Zephyr revision to contain the i.MX8QM and
i.MX8QXP patches that introduce support for the
serial interface.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-11-13 09:57:58 +02:00
Kai Vehmanen 1bfeb887c5 west.yml: update Zephyr to 26002b060708
Contains 500+ commits, including following directly affecting
SOF targets:

0a6fc6f70a25 soc: intel_adsp: cavs: fix dts memory address format
4b02bbc3297f cmake: xtensa: update xtensa SoC to use SOC_LINKER_SCRIPT variable
8bccb645aae8 boards: intel_adsp: fix board flashing
a4b9692155a3 soc: intel_adsp/cavs: add secondary dsp context save support
0891448ac908 soc: intel_adsp: don't enable interrupt before k_cpu_idle
c73e67018d0a power_domain_intel_adsp.c: revert recent INIT_PRIORITY change
385ceb714537 soc: xtensa: nxp_adsp: rt595: move .noinit

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-11-09 11:17:09 +02:00
Kai Vehmanen 1c729f43c8 west.yml: update Zephyr to 460c2167e4f3
Contains 600+ commits merged after 3.5.0 release, including following
directly affecting SOF targets:

76cb2a54f51f intel_adsp: Do not include device_runtime header
1fac5ed2a60b soc: xtensa/nxp_adsp: put guard in Kconfig.defconfig
f4cb487b79f9 modules: sof: Options only when module is available
02deea0e806a ace: alh: Only ACE1.5 has OSEL feature
f0326f72498c tests: dma_loopback: Intel ADSP ACE15 disable PM
adf6d0e3d80e soc: intel_adsp: lpsram enable retention mode
eeb4f2f76d6d soc: intel_adsp: hpsram enable retention mode
16f729214b50 soc: intel_adsp: lpsram init refactor
112611378f85 soc: intel_adsp: hpsram init refactor
cdd4d8470323 xtensa: add custom mem range check functions

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-10-30 10:23:47 +02:00
Tomasz Leman d449ff74d6 west.yml: update zephyr to v3.5.0
Updating zephyr version to v3.5.0 release.

Total of 352 commits.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-10-25 10:58:47 +03:00
Marc Herbert fd497c906a
Merge e330fb4ec7 into 5b5566f534 2023-10-11 16:16:37 +02:00
Laurentiu Mihalcea da08c1a6b1 west.yml: Bump up Zephyr revision
This commit bumps up the Zephyr revision to contain
the fix for the i.MX93 CI build failure.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-10-09 18:03:47 -04:00
Marc Herbert e330fb4ec7 Delete old rimage submodule and old rimage west module
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2023-10-09 13:08:07 -07:00
Marc Herbert 9b31875318 Add new sof/tools/rimage/tomlc99 submodule to west.yml too
Add it both as a git submodule and west submodule to minimize
disruption. The current focus is on rimage and that's a dramatic enough
change; one problem at at time.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2023-10-09 13:06:12 -07:00
Marc Herbert 0bd8c3b070 Upgrade rimage submodule and west submodule to ac487e09ca
Add the following rimage commits:

ac487e09ca Congfig: Add TDFB to TGL, TGL-H, MTL, and LNL
d89b7d28f6 ipc4: add google rtc AEC support for mtl
4fc431b355 elf: Remove unused elf.c
71553274b5 Switch to new elf reader and module parse functions.
539c2b388c module: Set of a new functions to parse modules
5f47509b67 elf_file: Set of new functions for reading elf files
7bc2958ba4 Config: Add DCblock to TGL, TGL-H, MTL, and LNL
e8b380d4ae Config: Add Multiband-DRC component to TGL, TGL-H, MTL, LNL
8bcf1fc911 mtl: fill in cps and cpc data for COPIER & GAIN modules
4a36634db6 mtl: fill in cps and cpc data for EQIIR module
fea2a30e56 mtl: fill in cps and cpc data for smart_amp_test  module
476d63608b mtl: fill in cps and cpc data for ASRC module
352f01fee4 mtl: fill in subsequent measured cps and mcps data
c183ce2739 mtl: add measured cps and cpc values
43eb2a435c Config: Add crossover component for MTL and LNL platforms

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2023-10-06 11:51:37 +01:00
Tomasz Leman 6d2352a107 west.yml: update zephyr to 3.5.0-rc1
Zepych update: total of 853 commits.

Changes include:

i8c4eec7ac6 intel_adsp: boot_complete must be done PRE_KERNEL_1
1fc16e6565 release: Zephyr 3.5.0-rc1
c910dc81a6 sys_clock: header: minor cleanup and doxygenization
b9f8b91692 kernel: sys_clock: remove stray z_enable_sys_clock prototype
cc2a558707 kernel: move more internal smp calls into internal domain
a1c7bfbc63 kernel: remove unused z_init_thread_base from kernel.h
209ff606be kernel: move internal smp calls to a internal header
e19f21cb27 kernel: move z_is_thread_essential out of public kernel header
f0c7fbf0f1 kernel: move sched_priq.h to internal/ folder
e6f1090553 kernel: Integrate object core statistics
1d5d674e0d kernel: Add initial k_obj_core_stats infrastructure
6df8efe354 kernel: Integrate object cores into kernel
55db86e512 kernel: Add initial obj_core infrastructure
eb1e5a161d kernel: FIFO and LIFO have their own sections
9bedfd82a2 kernel: Refactor CPU usage
baea37aeb4 kernel: Re-factor sys_mem_blocks definition
2f003e59e4 kernel: Re-factor k_mem_slab definition
41e0a4a371 llext: Linkable loadable extensions
4289359eb2 modules: mcux: fix HAS_CMSIS_CORE selection
1194a35aa2 xtensa: cast char* to void* during stack dump with %p
fcf22e59b8 xtensa: mark arch_switch ALWAYS_INLINE
b2f7ea0523 soc: xtensa/intel_adsp/ace: fix _end location
e560bd6b8c boards: intel_adsp: fix board compatible
b4998c357e mm_drv: tlb: Fix compile time warning
759e07bebe intel_adsp: move memory window setup to PRE_KERNEL_1

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-10-03 09:55:47 +03:00
Tomasz Leman 48259d8663 west.yml: update zephyr to b2f7ea0523
Zepych update: total of 736 commits.

492517b918 west.yml: Update NXP HAL SDK to 2.14
a5d1fd9857 soc: adsp: clk: update clock switch flow
9656056b19 dts: adsp: ace20: remove lp clock
50f0e223e8 dts: adsp: ace15: remove lp clock
cf6d5f95b6 adsp: clk: ace: select ipll if wovrco is unavailable
2d835e1b29 dts: adsp: ace20: replace hp with ipll clock
dcecda859c dts: adsp: ace15: replace hp with ipll clock
2f2689e3d3 intel_adsp: ace15: shim: update wovrco request bit
ea9dd59460 yamllint: bindings: add ipll clock index
1ddabfa8d8 dai: intel: dmic: fix shadow variable
b26921d776 dai: intel: dmic: New functions for writing fir coefficients
cba9ec10c3 dai: intel: tgl: dmic: Refactor of dai_nhlt_dmic_dai_params_get function
c28e8ba9ba dai: intel: dmic: Add pdm_base and pdm_idx variables in blob parser
2452aaad50 dai: intel: dmic: Separate fir configuration code into function
f74fd8edaf dai: intel: ace: dmic: Add dai_dmic_start_fifo_packers function
76d03e798f dai: intel: ace: dmic: Using the WAIT_FOR macro in waiting functions
3fbaed4de9 dai: intel: ace: dmic: Refactor of dai_nhlt_dmic_dai_params_get function
d7672af838 dai: intel: dmic: Combine PDM registers definitions
8ea53d49b6 dai: intel: dmic: nhlt: Move debug print code to a separate functions
81944c5c62 dai: intel: dmic: Move definitions of nhlt structures to a new file

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-09-28 07:53:37 +02:00
Kai Vehmanen af745b2e48 west.yml: update Zephyr to 2f90ef488a4e
Contains 75+ commits, including following directly affecting
SOF targets:

f0fd9f171342 drivers: hda: insert an empty ";" statement before switch() labels

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-09-05 14:14:42 -07:00
Kai Vehmanen 38faea7ec3 west.yml: update Zephyr to 5689916a70ad
Contains 450+ commits, including following directly affecting
SOF targets:

5689916a70ad soc: xtensa: intel_adsp: cavs: fix assert on L3_MEM_BASE_ADDR
34ea488da91c intel_adsp: ace20_lnl: add ALH DAI support
b7e181c2708b soc: intel_adsp: add HDA buffer interrupt functions
d68a58d6cd26 dts: xtensa: intel: add HDA DMA interrupt defs for ACE2.0
62c7729b3e1a dts: xtensa: intel: add HDA DMA interrupt defs for cAVS platforms
c6c6c5a5ed64 soc: intel_adsp: ace shim: add force L1 defines
0fead68e2b8e Revert "llvm: use proper syntax for --config option"
cd97eae73b4b soc: xtensa: intel_adsp: common: s/device.h/init.h
6cdabb4dff5e soc: xtensa: intel_adsp: common: add missing section_tags.h
c360284c6e14 soc: xtensa: intel_adsp: add missing init.h
ffd2121c65d3 soc: xtensa: intel_adsp: cavs: fix power_down_cavs() signature
a1d7ffdc374d soc: xtensa: intel_adsp: cavs: fix incorrect cached/uncached cast
ce7c30c12978 soc: intel_adsp/ace: use WAIT_FOR for core power transitions
3f0ee7f6db7a power_domain: intel_adsp: initialize after DMA
ca23a5f0cf75 xtensa: mmu: allow SoC to do additional MMU init steps
088a31e2bffa xtensa: mmu: preload ITLB for VECBASE before restoring...
40f2486b685c xtensa: mmu: rename MMU_KERNEL_RING to Z_XTENSA_KERNEL_RING...
18eb17f4cd69 xtensa: mmu: add arch_reserved_pages_update
4778c13bbeab xtensa: mmu: handle all data TLB misses in double exception
c723d8b8d3ac xtensa: Add missing synchronization
24148718fc6e xtensa: mmu: cache common data and heap if !XTENSA_RPO_CACHE
b6ccbae58dc4 xtensa: mmu: use _image_ram_start/end for data region
257404a14327 xtensa: mmu: init: only clear enough entries in way 6
614e64325d48 xtensa: mmu: no longer identity map the first 512MB
b5016714b082 xtensa: mmu: handle TLB misses during user exception
98ffd1addd6a xtensa: crt1: call z_xtensa_mmu_init
38d4b7872401 xtensa: mmu: remove printing vaddr registers during exception
3d63e2060edf dts: cpu: add cdns,tensilica-xtensa-lx3

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-09-01 12:05:50 +03:00
Kai Vehmanen d05588e115 west.yml: Update rimage revision to 4fb9fe0057
Includes following rimage commits:
4fb9fe0057 config: lnl+mtl: fix length of ADSP.man CSE manifest
c809af8168 Config: Add crossover component for TGL and TGL-H cAVS platforms
8c8440070a style: trailing whitespace is the root of all evil
d20f1d8a85 actions: remove travis
af9a2fe58f Config: Fix comment typo for EQ FIR module
b8ee1aa8f6 Config: Add DRC component to TGL, TGL-H, MTL, LNL

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-08-28 10:43:31 +03:00
Kai Vehmanen b81f1309e8 west.yml: update Zephyr to ef6486170786
Contains 2211 commits, including following directly affecting
SOF targets:

ab0ed577111b mm: intel_adsp_tlb: Handle address space conversion warnings
823e6b70d240 arch: xtensa: Implement arch_float_enable&disable
be779f2a6195 intel_adsp: hda: fix usage of FIFORDY bit
498f294b2720 west: update sof ref in manifest
42ca64d60cd2 tests: dma_sg: intel_adsp_ace15 specific config
0e373019d65e dma: intel_adsp_gpdma: Unmask interrupt on ACE
6e66efa08871 soc: intel_adsp_ace15: Include stdint.h
250748bfe671 intel_adsp: Add option about switch off hpsram
b4293ec026c4 dts: xtensa: nxp: add nodes for IPC
1295283a8a72 soc: xtensa: nxp: add resource_table section in linker script
e6d89268572d xtensa: set no optimization for arch_cpu_idle() with xt-clang
a458d0443a91 xtensa: allow arch-specific arch_spin_relax() with more NOPs
f60306193844 soc: xtensa: intel_adsp: cavs: fix PM hooks guards
385ad46a39ca boards/xtensa: Skip cleaning intermediate binaries up
1c0c2a095b48 drivers: intel_adsp_gpdma: Fix release ownership
e55fb88bcbe7 soc: intel_adsp/ace: update clock rate
35e8e6fa03fa soc/xtensa/nxp_adsp/CMakeLists.txt: use new WEST_SIGN_OPTS variable
c35d97534fd1 include: util_internal: add Z_SPARSE_LIST_{ODD|EVEN}_NUMBERS
25c6553edde5 soc: intel_adsp/ace: use functions to do CPU power control
3764814831a7 intel_adsp: boot: d3: hp sram reinit

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-08-23 19:34:26 +03:00
Andrey Borisovich e8fdfdda7a west.yml: Update rimage revision to aa0ac9ea
Pull in following rimage changes:
aa0ac9eae6 rimage.c: fix bug where -p requires a new
and ignored parameter

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
2023-07-31 11:21:50 +01:00
SaiSurya Ch 8fb4860007 west.yml: Update rimage revision to 48777207
Pull in following rimage changes:

48777207f5 (HEAD) config: add vangogh toml file to support vangogh build
089157d461 Config: Add Aria module to tgl-cavs.toml and tgl-h-cavs.toml

Signed-off-by: SaiSurya Ch <saisurya.chakkaveeravenkatanaga@amd.com>
2023-07-13 14:10:03 +03:00
Rander Wang 6ddd6554b9 west.yml: upgrade Zephyr revision - Restore IDC interrupt on D3 exit
After exiting D3 state if IMR context save is enabled, IDC interrupt
must be re-enabled again for all cores. It fixes multicore CI test
issue.

431108d89e175: intel_adsp: ace: Restore IDC interrupt on D3 exit

Signed-off-by: Rander Wang <rander.wang@intel.com>
2023-07-12 10:16:45 +03:00
Andrey Borisovich 73cd960e0e west.yml: upgrade Zephyr revision - update IPC4 ipc_platform_send_msg
During last changes in Zephyr that implemented power transition for the
IPC Device, signature of the intel_adsp_ipc_send_message had changed
and now returns negative int error codes (previously bool on success).
Updated single function reference in SOF ipc_platform_send_msg().
Implementation had not changed as the function may return only
-EBUSY error code until the Zephyr Device Power Management option
is disabled.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
2023-06-26 17:19:45 +03:00
Kai Vehmanen e7e5006517 west.yml: update Zephyr to 3.4.99
First Zephyr update after 3.4.0 release.

Contains 524 commits, including following directly affecting
SOF targets:

e2e3dc077118 dts: xtensa: intel: add imr entry to cavs25_tgph
6c9a360647c8 drivers: intel_adsp_gpdma: Fix typo in reg name
a8b28f13c195 soc: intel_adsp: cavs: add simple IMR functionality
339b00de11e5 soc: xtensa: intel_adsp: fix memory bank shutdown
5dfaf23f47b7 xtensa: intel_adsp: lnl: Fix dspcs struct
09085ef63c02 dts: xtensa: intel: update cavs25 sram size
b871138fae1f soc/intel_adsp: fix typo in L1EXP definition
9db44fa2813c toolchain: xtensa: enable C11 features with xt-clang
2ba7855ddf23 modules: mipi-syst: support minimal C library

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-06-21 23:19:46 +03:00
Marc Herbert e9f1531b50 west.yml: add hal_nxp
This is small and required to automated the very first LP64 compilation.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2023-06-14 13:19:22 +03:00
Kai Vehmanen bf6ae6dfa4 west.yml: update Zephyr to 3.4.0-rc2
Forward Zephyr to commit 2ad1a24fd60d0df8cb45fb6ed6acf7b0d3820754 .

Contains 566 commits, including following:

dd09b04dc33e boards: xtensa: update rimage and west sign documentation
d98a7c2f8ddb soc: xtensa: cmake: add new WEST_SIGN_OPTS variable
794dff37754f boards: xtensa: mention the $HOME/.flexlmrc file alternative
ac3cafa2edd8 boards: xtensa: remove UP2 from README file
aa5b66be5f1f intel_adsp: cavs25: configure access to ALH
8e3437461d78 soc: intel_adsp: remove obsolete headers for cAVS platforms
44415eb881c8 intel_adsp: Initialize threadptr register
1c130d006099 arch: xtensa: Enable builds without the multithreading
f0b7c275bba9 boards: xtensa: intel_adsp_generic.rst: fix cAVS meaning
49c7aa56fa0c soc: intel_adsp: undefine NOP32
445f4e887712 arch/xtensa: undefine NOP32

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-06-06 10:32:58 +03:00
Fred Oh 07b07f9bfe west.yml: Update rimage revision to 4ce79b15
Pull in following rimage changes:

4ce79b152e (HEAD, manifest-rev) kpb: update kpb uuid for lnl
649b0a6790 file_simple: Allocate correct buffer size for writing sections out
1ea1327b9c README.md: remove "install" target
8f250a99eb Config: Change indent for SRCINTC
acd8a2bc1b Config: Change SRCINTC for tgl-cavs.toml and tgl-h-cavs.toml to LL
77d4a2acd7 cmake: remove "install" target

Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
2023-06-02 13:00:11 +03:00
Tomasz Leman 478cea5b3d west.yml: upgrade zephyr to 7d54586751
Zepych update: total of 228 commits.

Changes include:

- build LNL with Zephyr SDK,
- MMU initial implementation,
- check for pending ack in intel_adsp_ipc_is_complete.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-05-25 14:45:42 +03:00
Laurentiu Mihalcea d735c91d9a west.yml: Update Zephyr revision
Update Zephyr revision to contain CONFIG_DCACHE_LINE_SIZE
additions.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-05-24 15:24:07 +03:00
Andrey Borisovich 01b550092d west.yml: upgraded Zephyr revision to support new Zephyr SDK 0.16.1
Commit https://github.com/zephyrproject-rtos/zephyr/commit/9fc99928caf0
requires new Zephyr SDK 0.16.1 to work and breaks compatibility to
older Zephyr revisions.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
2023-05-20 01:45:42 +03:00
Paul Olaru 1acead174c west.yml: Upgrade zephyr to fa5117225a
This update is needed to include Zephyr specific patches required for
building SOF on i.MX platforms with Xtensa toolchain.

Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
2023-05-15 11:44:28 +03:00
Tomasz Leman 93947f98a4 platform: ace: notifying about idle thread readiness
Informing the primary core that the Idle thread on secondary core is
ready. During the D3 exit flow thread is not initialize again, but
restored from previously saved context.

This patch includes also zephyr version update to aba3b12e31 (total 15
commits). Changes related to intel_adsp contain refactor and fixes for
ACE secondary cores power flows.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-05-11 19:08:28 +03:00
Anas Nashif 54c4b88d57 zephyr: use system cache API
Use zephyr cache APIs instead of xtensa specific ones.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-04-28 10:37:55 +03:00
Tomasz Leman 9632135d33 west.yml: upgrade zephyr to 9028ad5d71
Zepych update: total of 132 commits.

Changes include GP DMA power management changes.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-04-26 16:55:10 +03:00
Gerard Marull-Paretas ca68ba68f2 zephyr: update SYS_INIT calls
Update Zephyr head, and use the new call signature:
int (*init_fn)(void);

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2023-04-24 19:13:47 +03:00
Adrian Warecki 3cf3c9bb84 rimage: Update rimage revision to ab0429f
Changed rimage submodule revision to:
ab0429fdbe

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-04-24 12:03:38 +03:00
Kwasowiec, Fabiola 6a0db47338 kpb: update uuid in rimage
Change of uuid
regarding Windows compatibility

Signed-off-by: Kwasowiec, Fabiola <fabiola.kwasowiec@intel.com>
2023-04-04 15:20:30 +02:00
Fred Oh 7bc3bde203 west.yml: update zephyr revision to fix MTL pause-resume
There is a merged MTL dmic fix.
https://github.com/zephyrproject-rtos/zephyr/pull/56209

Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
2023-03-29 15:09:23 +03:00
Jaska Uimonen e9cfb64f0d zephyr: cavs: use zephyr pm, clk and dma glue
Start using zephyr pm_runtime, clk and dma glue code in cavs25 native
drivers build. Move the files from ace/lib into zephyr/lib.

Also update west.yaml to related zephyr commit as power related
files have been moved to zephyr side.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2023-03-27 12:37:26 +03:00
Kai Vehmanen 7d5c3238e3 west.yml: upgrade zephyr to e40859f7
Total of 1128 commits, including following related to
dma-dw/intel_adsp/sparse/dmic/xtensa:

e40859f78712 Revert "dma: dw: Do not program SAR/DAR and CTL_HI/LO when using HW LLI"
7a85983ebcf2 xtensa: remove ELF section address rewriting
b32b321f502a dma: dw: Poll to check for channel disable with timeout
6226f9e6e44f dma: dw: fix the return value check
08d9efb202cc dma: dw: Do not program SAR/DAR and CTL_HI/LO when using HW LLI
045c68673491 dma: dw: Add a debug utility function
bd705e68b048 soc: xtensa: esp32: increase shared memory region
9854c915ffdf intel_adsp: cpu init refactor
9d5c21d58003 dts: xtensa: nxp: remove unused include
68c1cafb411e intel_adsp: dts: ace: lower case 71C00 to fix DTC warning
a8c0123d3c54 intel_adsp: cmake: add_custom_command(.mod) to fix incremental build
b00c63e7640c footprint: ci: Remove audio SOF samples
1efaa94bc64b drivers: audio: dmic_nrfx_pdm: drop -pin support
8ef2cd20d90a Drivers: DAI: Intel: DMIC: Shorten unmute ramp time
eead89e7f22d soc: intel_adsp: cavstool.py: simplify asyncio.run() call
cdae0bb7596e boards: intel_adsp_ace15_mtpm uses xcc-clang toolchain for twister

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-03-22 15:48:52 +02:00
Guennadi Liakhovetski 9aa2c13356 build: upgrade to the current rimage upstream
Upgrade to the present rimage upstream version to fix tgl building
with Zephyr main branch head.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2023-03-21 22:14:11 +00:00
Keqiao Zhang 634c65fa47 west.yml: upgrade rimage to d32db50
Pull in following rimage changes:

d32db50 mtl: add Aria module to extended manifest
5bc2010 rimage: fix build error
35bc644 mtl: add eq-iir and fir support
6fad356 rimage: Removed hash context from image structure
6c7a151 hash: Remove old hash functions
d258ea2 manifest: pkcs1_5: Use new hash functions
2bd8be3 hash: New hash functions
93c5e8b misc_utils: Move byte_swap function to new misc_utils.c file
9ce1cc8 ext_manifest: Fix fw_ext_man_cavs_header version
a4ca53c toml_utils: Adding support for decimal numbers in hex parser
5ebbd65 rimage: use hex number
36c0c90 elf: Use the get_file_size function
98c7f7b manifest: Use the get_file_size function
6a64cb9 file_utils: Add a new get_file_size function
055ea7e file_utils: manifest: ext_manifest: Add new create_file_name function
fed69d4 toml_utils: adsp_config: Moved generic parser functions to toml_utils
0931d9c main: heap_adsp release fix
3aa199f config: mtl: set init_config for micsel
d48ad6b adsp_config: add dump for init_config
ffd0542 adsp_config: make the default value zero for init_config
cb9c880 config: tgl-cavs: add kpb, selector and kd support
bf23b5e config: mtl: set KDTEST module_type to 8

Signed-off-by: Keqiao Zhang <keqiao.zhang@intel.com>
2023-03-08 14:12:06 +02:00
Andrey Borisovich b2073f1f26 west.yml: upgrade Zephyr to e3ae110a05d
Includes:
- rename of xcc-clang compiler to xt-clang
- updates in C++ headers in zephyr/sys/util.h that require C++14
standard now.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
2023-02-28 14:59:41 +00:00
Jaska Uimonen 5efc08d5aa dai: change to use new version of dai_config_get
Start using new version of dai_config_get where config struct is given
as pointer argument.

Update west.yaml to point to correct zephyr version for this change.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2023-02-21 15:45:17 +00:00
Kai Vehmanen a942f10731 west.yml: upgrade Zephyr to 0c0d73721ed
Includes patches to dai-zephyr.c to adapt to DMA interface
change for DW/HDDMA drivers.

Total of 1168 commits, including following related to
intel_adsp/sparse/dmic/xtensa:

8f5bcb2e76c3 intel_adsp: ace: fix linker script for xcc-clang compiler
18ce85c20130 tests: intel_adsp: ssp: fix dma data sizes
60a20471b561 intel_adsp: ace: enable interrupts for secondary core
6045eed2f361 intel_adsp: ace: enable core power gating
e1dbc2efef50 intel_adsp: ace: add core power off step
a99b073392fc intel_adsp: ace: d3 exit update
156c7cd21759 intel_adsp: bbzero/bmemcpy with picolibc fix
60196ca1126a cmake: sparse: deprecate old sparse support
91902c5fd4db cmake: add sparse support to the new SCA infrastructure
a684714d5c82 soc: intel_adsp: Correct HDA parameter docstrings
db495a5ebee3 xtensa: stop execution under simulator for double exception
8ff88346955b xtensa: sparse: fix address space mismatch
7965fd2b4a8a samples/boards/intel_adsp: Make sample work with twister
422250d3b183 mm: intel_adsp_mtl_tlb: suppress sparse address space warnings
618a478ded70 xtensa: fix sparse warning when converting to uncache pointer
8b391dc43841 drivers: audio: dmic_nrfx_pdm: Fix a race condition in the driver
8794de2934f7 intel_adsp: soc: ace: Add communication widget driver
a9b3d935500c intel_adsp: dai: Add support for ALH up to 16 nodes
837432506269 drivers: dai: intel: dmic: don't use assert for error handling

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-02-21 10:14:17 +00:00
Kai Vehmanen 00442c2310 west.yml: upgrade rimage to 3863e94fa5
Pull in following rimage changes:

3863e94fa5 Don't convert ROM addresses to cached aliases
1e0a85b44a config:tgl/tglh: Do not set cached/uncached address aliases
9b507ecc82 config: set cached and uncached aliases for affected platforms
def9d51d7d Fix regression - make default return code an error
d48ae7aada config: mtl: Set init_config for smart amp
b5d762290f config: tgl-cavs: set init_config for smart test
15ea48177a src: adsp_config: Use reserved bits for module init config
ec649f37d6 Convert all ELF addresses to cached for calculations

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-02-14 15:33:24 +00:00
Jaska Uimonen 4d735045a0 west.yml: upgrade rimage to 7bc3cfc
upgrade rimage to
7bc3cfc946

7bc3cfc config: mtl: add smart amp test module config
3da7739 config: correct module config load_type
bc7d49d config: align module_type with mtl for tgl and tgl-h
bdf48ee config: tgl-cavs: add fir and iir eq module config

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2023-02-07 14:46:53 +00:00
Adrian Warecki 1fbd4c6605 zephyr: ace: pm_runtime: Use new register name & update zephyr revision
DFDSPBRCP register have been renamed to DSPCS in Zephyrs commit
21f278c04bc258eb344ac5b2123b49d760b5b71d. This commit changes the
references from old to new name.

Changed zephyr revision to d9c4ec31fc49e7eef3c8c3b0d07827cc04e6efee

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-01-13 13:11:08 +02:00
Serhiy Katsyuba 05b903bc29 west.yml: Update Zephyr
Updates Zephyr to current top: e4fcb32451c587a3e4ba7f8bf3fc602b16f9652b.

This is to enable ALH multi-gateway feature. The required Zephyr commit
for Intel ADSP MTL is:
https://github.com/zephyrproject-rtos/zephyr/pull/53066

Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
2023-01-06 15:15:42 +00:00
Jaska Uimonen 39ff8cdbea west.yml: upgrade rimage to ba8534bb23
upgrade rimage to
ba8534bb23

ba8534bb23 Fix bitmap according to the IMR type
f3eef3cfb6 Fix IMR type parsing
bdba8259fe Add a command line option to set an Intel-specific PV bit
1c48208850 config: tgl-cavs: add smart amp test module config
082b6261c9 config: Add mt8188.toml

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2023-01-05 15:05:11 +02:00