Currently idc_wait_in_blocking_mode() spins and reads timer and mailbox
IO which can slow down secondary core boot (which share the physical
resources).
Relax the IO to speed up booting of secondary cores.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Make all timer IO is atomic in the scheduler by adding a new
platform_timer_get_norq() API that validates 64 bit reads.
ALso make sure there is enough time for setting the new timeout
in the CAVS platforms.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
After checking the kernel log the HOST will always handle
and replay DSP sent IPC GLB_TRACE_MSG in about 40us.
set the FW side wait timeout to 100us to improve the performance
of DSP power switch.
Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
In current kernel logs the CTX_SAVE IPC will always take more than 10ms,
but before 0b2876b279 it only need less than 1ms. This patch fix the
wrong usage of always timeout for poll_for_register_delay.
IPC_DIPCIDR_MSG_MASK is the mask for msg from BIT 0 to 30 while
we want to check if BIT 31 is 0. now change the MASK and VAL to correct
values to make the poll and delay will return when there is no DSP sent
IPC.
fixes commit 0b2876b279 ("cavs: pm: poll for IPC_DIPCIDR_BUSY to be
clear before powerdown hpsram")
Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
Long run multiple pipeline tests fail during DMIC
config with dynamic pipeline set/up. Holding the dai
lock during DMIC config fixes the issue.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Long run multi pipeline tests fail with dynamic pipeline
setup when trying to enable/disable the DMA and DAI.
Disabling interrupts during get/put addresses this issue.
Suggested-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Zero functional change.
Rename "is_non0_power_of_2(x)" to "is_power_of_2(x)" because it's
simpler and because zero is not a power of 2.
Rename "compile_fail_zero_or_true(x)" to "compile_assert()" because it's
much simpler and because I really couldn't find what "zero_or_true"
meant?
Add a few comments, especially explain why COMPILE_TIME_ALIGNED(align)
uses __builtin_constant_p(align) because it took me ages to figure it
out.
Also recommend ALIGN_UP_COMPILE() over ALIGN_COMPILE() when compiling
with -O0
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
The singular "Action" makes it look like our workflow is an action. The
plural "Github Actions" is at least the name of the product; so it's
vague enough.
A technically acccurate name would be "Main workflow" but we have only
one so it would be useless plus we're next to "Jenkins" and others and
want to stay consistent with them.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
pipe-codec-adapter-capture.m4 is implemented as a common pipeline
module of a capture codec w/ Codec Adapter API.
For codec developers, a upper-layer tplg file should be provided for
the specified codec with the information of control bytes, schedule
core, and byte-control names.
Signed-off-by: Pin-chih Lin <johnylin@google.com>
pipe-codec-adapter-playback.m4 is implemented as a common pipeline
module of a playback codec w/ Codec Adapter API.
For codec developers, a upper-layer tplg file should be provided for
the specified codec with the information of control bytes, schedule
core, and byte-control names.
Signed-off-by: Pin-chih Lin <johnylin@google.com>
Only cAVS platforms use the single-channel DMA scheduler, all
other platforms use the multi-channel one. Add Kconfig options
to only build one of them.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
If IPC_DIPCIDR_BUSY is set, DSP is sending IPC to HOST and HOST will
try to read from mailbox on hpsram.
polling for IPC_DIPCIDR_BUSY is cleared before power offer hpsram to
avoid HOST read fail.
Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
Makes it possible to place the build directory anywhere.
This directory does not seem in use any more; fixing it does not change
the doxygen output. However this does silence a doxygen error message
when the build directory is not in the usual place.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Commit 05e1c26166 ("byt-ssp: fixes for DSP modes") removed a
work-around for known hardware bugs, causing channel swapping
in I2S mode. Restore the work-around but make sure it's only
enabled in I2S and LEFT_J modes.
Fixes: #3699, #3520
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
When overrun happens for maxim_dsm_ff_proc() or maxim_dsm_fb_proc(), it
is not fatal, change the logging level to warning to avoid flooding the
memory windows.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
To support exist function - fullfile() path addition is to prevent Matlab (differently than Octave)
to give false positive with some other directory location with it's search path
Added correction to isempty.
Signed-off-by: ShriramShastry <malladi.sastry@intel.com>
Full translation except the IRC notifications, appreciate if someone
else can add later. Seems much faster.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Switch to use component id and pipeline id for comparison, to avoid
getting wrong results when using different pointers point to the same
component/pipeline.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Once an Xrun happens, only clearing the interrupt can't recover it, stop
the dmic to avoid interrupt flooding.
This will lead to subsequent pipeline Xrun and eventually the pipeline
will be stopped.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
This makes it possible to switch to Ninja with a single line change
which can be useful to test build changes and issues.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Sue Creek is the only platform using the ALIGN() macro in assembly. If
it had been built in CI then we would have avoided the ALIGN()
regression in commit 39266cac81 ("core: assure alignment is only done
on power of 2 values"). Building Sue Creek is practically free and finds
bugs so let's build it.
I'm aware Travis isn't the future but it's still running for now and
this is a tiny and totally trivial change that took 1/100 of the time
spent writing this commit message. It's also a reminder not to forget
Sue Creek in whatever will replace Travis.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
This patch will release previous clock in low power mode
because there are some rare problems with not releasing it
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
It will allow to define cpu lowest clock per platform
instead of fixed one (LPRO)
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
commit 39266cac81 ("core: assure alignment is only done on power of 2
values") changed the alignment macros, they now use C code to perform a
sanity check. This broke ALIGN() usage in
platform/suecreek/include/platform/lib/memory.h in two different ways:
1. it broke static initializers in platform/suecreek/base_module.c
because these can't use statement-expressions. This could have been
fixed by simply switching to ALIGN_UP_COMPILE(), BUT:
2. memory.h files are also included in assembly.
Also note memory.h values are copied unprocessed to linker scripts that
require the ALIGN() spelling.
For these reasons ALIGN() needs to be switched back to a "dumb" macro.
Preserve the sanity checks just added in alloc.c and pm_memory.c by
switching them to the new and smarter ALIGN_UP() macro.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
This will allow to write zeros to the buffer without
reference to a source buffer
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
alloc_block() will call platform_shared_commit() on the map
too, no need to do that twice.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
temp_bytes is only used if CONFIG_DEBUG_BLOCK_FREE is
defined. Limit its scope to only such configurations.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
The condition "size + alignment <= block_size" for allocating
memory from a signle buffer is sufficient but not precise enough.
For example if we want to allocate 20 bytes with 64-byte alignment,
a 32-byte buffer *might* be sufficient if it's suitably aligned.
Fix the algorithm to account for such cases.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
For sof-tgl.ri and sof-tgl-h.ri the old match function will
always return tgl layout. Add suffix in match to make sure
we always match the right name.
Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
Liam Girdwood