Commit Graph

9156 Commits

Author SHA1 Message Date
Andy Ross 3ae99d937a zephyr/wrapper: Handle OOM correctly in rzalloc()
Fuzzing caught this function failing to handle a heap failure and crashing.

Signed-off-by: Andy Ross <andyross@google.com>
2022-12-07 17:25:39 +00:00
Andy Ross 572a08ea2c dma_trace: Add missing initialization check
It's possible to reach dma_trace_on() from IPC handlers based on host
state before DMA trace has been initialized (found this via fuzzing,
so the precise circumstances are a little opaque).  When that happens,
the schedule_task() call ends up putting a delayed work queue item
into the Zephyr queue which has a NULL callback.  This eventually
blows up later when the timeout expires.

Check for initialization state before doing anything.

Signed-off-by: Andy Ross <andyross@google.com>
2022-12-07 17:25:39 +00:00
Andy Ross be0fddaf77 ipc3: Silence top-level IPC cmd formatting errors when fuzzing
Command format errors during fuzzing are reported for virtually all
commands, and the resulting flood of logging becomes a severe
performance penalty (i.e. we get a lot less fuzzing done per CPU
cycle).

Signed-off-by: Andy Ross <andyross@google.com>
2022-12-07 17:25:39 +00:00
Andy Ross c50eddce1f platform: Add Zephyr native_posix-based emulation environment
This extends the ideas in CONFIG_LIBRARY=y to implement SOF as an
application for the Zephyr native_posix architecture.  These are host
x86 or x86_64 binaries that include a full OS build, which can be used
(via mocked drivers) for testing against host validation environments
like ASAN/MSAN.

The mechanism uses the existing "host" architecture used by
CONFIG_LIBRARY, but adds a new platform layer named "posix", populated
entirely with stubs.

No driver integration is provided in this patch.  The resulting
executable builds correctly, but has no devices and won't do anything.

Signed-off-by: Andy Ross <andyross@google.com>
2022-12-07 17:25:39 +00:00
Andy Ross 054230481f zephyr: Not all builds are xtensa
Don't need the arch-specific cache header if we're building for native_posix

Signed-off-by: Andy Ross <andyross@google.com>
2022-12-07 17:25:39 +00:00
Andy Ross 001bb8f331 zephyr/wrapper.c: Misc portability/correctness cleanups
This file needs the clk.h APIs, so include the header.  Don't include
the Xtensa cache.h, as it's unused (and not supposed to be, zephyr.c
is portable code).  Use the proper interrupt en/disable APIs instead
of the SOC-level calls they wrap.

Signed-off-by: Andy Ross <andyross@google.com>
2022-12-07 17:25:39 +00:00
Andy Ross 3de98c7886 sof/trace/trace.h: Add missing Zephyr platform header
Can't use k_*() APIs without including kernel.h

Signed-off-by: Andy Ross <andyross@google.com>
2022-12-07 17:25:39 +00:00
Andy Ross b4025e5d49 zephyr: Add missing kernel.h include
The timer.h header references k_cycle_get_64(), which is defined in
kernel.h.  Was previously hidden by a transitive include somewhere.

Signed-off-by: Andy Ross <andyross@google.com>
2022-12-07 17:25:39 +00:00
Andy Ross c6ab5b046d pipeline-graph.c: Needs clk.h
This was calling clk APIs without the header.  Discovered when
native_posix exposed a previous transitive include.

Signed-off-by: Andy Ross <andyross@google.com>
2022-12-07 17:25:39 +00:00
Marc Herbert 280dca92b5 xtensa-build-zephyr.py: build rimage with -GNinja by default
This saves a couple seconds when building from scratch on Linux.

On Linux the default CMake generator is "Makefiles" which is _not_
parallel by default.

Thanks to the previous commit it's still possible to manually switch to
"Makefiles" if desired.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2022-12-07 17:21:43 +00:00
Marc Herbert 2fcab330b9 xtensa-build-zephyr.py: do not CMake-reconfigure rimage every time
It's pointless and hardcodes the CMake generator.

Also remove wrong comment added in commit
6cba64d2cb ("xtensa-build-zephyr.py: fix a few minor pylint warnings")
The rimage part of the comment was flat out wrong.
The smex part of the comment is correct but in the wrong place.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2022-12-07 17:21:43 +00:00
Gongjun Song af5d5545fe src: convert the SRC component to use the module interface
Adopt module interface for src component.

IPC3 has compatibility issues, it continues to use comp_driver.
Convert to module adapter only for IPC4.

Signed-off-by: Gongjun Song <gongjun.song@intel.com>
2022-12-07 13:57:10 +00:00
Gongjun Song 4ccf228b54 src: change some functions to fit the module adapter
Due to add module adapter feature, some functions needs to be
changed to fit it.

Signed-off-by: Gongjun Song <gongjun.song@intel.com>
2022-12-07 13:57:10 +00:00
Gongjun Song 8f217e240c src: move some functions positions to fit the module adapter
Due to add module adapter feature, some functions need to be moved
to new locations to fit it.

Signed-off-by: Gongjun Song <gongjun.song@intel.com>
2022-12-07 13:57:10 +00:00
Gongjun Song b25470fc44 src: fix sink rate setting error of SRC ipc4
The commit that caused this bug is 1ec9fc1fbf. Added the sink_c
parameter, but did not set sink_c in src.c.

This commit will set sink_c to solve the issue of wrong sink rate.

Signed-off-by: Gongjun Song <gongjun.song@intel.com>
2022-12-07 13:57:10 +00:00
Gongjun Song 59c0e6b7ba src: remove some unnecessary brackets
Remove some unnecessary brackets in src_verify_params function.

Signed-off-by: Gongjun Song <gongjun.song@intel.com>
2022-12-07 13:57:10 +00:00
Gongjun Song a43dae5dd2 src: remove unnecessary if conditional judgment
No need to add if condition judgment and rfree(NULL) is allowed.

Signed-off-by: Gongjun Song <gongjun.song@intel.com>
2022-12-07 13:57:10 +00:00
Joe.Cheng 33cd4ce23f module_adapter:dts: required code update for DTS library v1.0.7
1. Remove totalBufferLengthInBytes as it's handled by SDK internally now.
2. Add debug log to print config size

Signed-off-by: Joe.Cheng <joe.cheng@xperi.com>
2022-12-07 13:47:03 +00:00
Joe.Cheng a26f83c52f module_adapter:dts: support module life cycle change
1. Add a free memory function to support PR#6230 and PR#6331,
   the latest prepare/reset API flow update of module_adapter.
2. This requires DTS library v1.0.7 to support this change.

Signed-off-by: Joe.Cheng <joe.cheng@xperi.com>
2022-12-07 13:47:03 +00:00
Ranjani Sridharan 76c85091bf ipc4: handler: Fix D3 entry sequence
Stop platform timer and disable interrupts before D3 entry for CAVS
platforms.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2022-12-07 13:19:25 +00:00
Marc Herbert f71eb15818 .github/workflows: upgrade actions/checkout@v2 -> v3
This should get rid of most warnings in daily tests

```
Node.js 12 actions are deprecated. For more information see:

https://github.blog/changelog/
 2022-09-22-github-actions-all-actions-will-begin-running-on-node16...
Please update the following actions to use Node.js 16: actions/checkout@v2
```

Example at
 https://github.com/thesofproject/sof/actions/runs/3597808171

v3 seems backward compatible. Upgrade only the most used instances for
now (most used because of the `matrix` of platforms), upgrade everything
in a few days if no issue is spotted.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2022-12-07 11:53:47 +00:00
Iuliana Prodan 4a9a99aeb2 imx: clear general purpose pending interrupt
Clear general purpose pending interrupt
before enabling interrupts between host and DSP.
The GIPn bit, from MU Status Register is cleared
by writing it as “1” in order to de-assert the
interrupt request source at the interrupt controller.

This fixes a fw loading failure after a soft reboot
caused by GIP bit that was 1.
The problem was the MU which triggered endless interrupts
causing timeout on Kernel side, which was waiting for
FW_READY message.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2022-12-05 18:14:42 +02:00
Iuliana Prodan 6131901c46 scripts: qemu-check.sh: update READY_IPC for imx8
Update READY_IPC value based on changes regarding MU reset.
READY_IPC value comes from:
- clear GP pending interrupt #0 and #1 from MU's xSR register;
- enable GP #0 and #1 for Host -> DSP and DSP -> Host
message notification from MU's xCR register;
- now interrupt host to tell it we are done booting
by setting GIRn bit in MU's xCR register.

So, "00 00 00 c0 00 00 04 c0" is the MU's xSR and xCR registers:
xSR: c0000000 and xCR: c0040000

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2022-12-05 14:33:46 +00:00
Rander Wang 8818e50b6a topology2: hda: share deep buffer conf setting
Deep buffer is mixed with HDA analog.

Signed-off-by: Rander Wang <rander.wang@intel.com>
2022-12-05 14:32:20 +00:00
Rander Wang c4f6b3dfc5 topology2: sdw: share the deep buffer conf setting
Deep buffer is mixed with Jack out.

Signed-off-by: Rander Wang <rander.wang@intel.com>
2022-12-05 14:32:20 +00:00
Rander Wang 73aeccc6ad topology2: nocodec: add deep buffer support
Deep buffer is mixed with ssp0 stream.

Signed-off-by: Rander Wang <rander.wang@intel.com>
2022-12-05 14:32:20 +00:00
Rander Wang 9ec745b1de topology2: add common deep buffer support
It will be shared by I2S, HDA and SDW platforms

Signed-off-by: Rander Wang <rander.wang@intel.com>
2022-12-05 14:32:20 +00:00
Gerard Marull-Paretas 8c16ce371d sof: common: namespace common DIV_ROUND_UP macro
DIV_ROUND_UP is a common macro exposed in public headers without
namespacing. Change the name to SOF_DIV_ROUND_UP to avoid collisions
with other systems/libraries.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-12-03 02:36:09 +02:00
Bard Liao f6f9b62d5a topology2: add ssp multi stream capture
Add ssp multi stream capture support.

Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
2022-12-02 16:51:16 +00:00
Bard Liao efca29469f Topology2: pipeline: gain-capture: add 16 bit format support
16 bit format was missed in the pipeline.

Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
2022-12-02 16:51:16 +00:00
Seppo Ingalsuo f6b8b0e485 Tools: Test: In src_test.m do quick test without specify in/out rates
If the rates are an empty vector [] the default rates are used. This
allows test command "src_test(32, 32, [], [], 0, 0);" to do a quick
test without plots with default 8 - 192 kHz in/out matrix.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2022-12-02 15:30:14 +00:00
Seppo Ingalsuo 082672ea9f Tools: Test: In src_test.m prevent error with empty plot handle
Octave errors if plot handle is empty, Matlab doesn't. This can
happen if frequency response test data read fails. In that case
an empty plot window is stored as indication of error.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2022-12-02 15:30:14 +00:00
Seppo Ingalsuo 48bf7af183 Tools: Test: Prevent in src_test.m unnecessary window open
This speeds up src_test.m with no plot window opening for rate
that is not supported in the conversions matrix. No output file
returns failure -1.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2022-12-02 15:30:14 +00:00
Seppo Ingalsuo dccae1c5b2 Tools: Test: Audio: Reduce testing verbosity in test measure scripts
These prints are normally not useful and slow down test with a
lot of scrolled text output.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2022-12-02 15:30:14 +00:00
Seppo Ingalsuo 155137b878 Tools: Test: Timeout src_test.m after 300k copy() iterations
This prevents testbench run freeze from src_test.m. Function
test_run_src() passes to testbench option -C that limits the number
iterations to 300k that corresponds to 5 min of audio.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2022-12-02 15:30:14 +00:00
Seppo Ingalsuo e627c7994f Audio: SRC: Fix generic C version overflow in 16 bit round
This patch adds the missing saturation to rounding in function
src_polyphase_stage_cir_s16(). The error was caught with
"src_test(16, 16, [176400 192000], 8000)" where both conversions
made an overflow in chirp test.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2022-12-02 15:30:14 +00:00
Seppo Ingalsuo 16fbd5f081 Audio: SRC: Increase stage buffer size and change copy() run condition
This patch increases the buffer between stage 1 and stage 2 by
factor 1/8. It prevents a freeze that happens with conversion
from 11025 to 8000 Hz.

Also the SRC is let run if stage 1 can consume samples or stage 2
can produce samples. There is no need to prevent run if both can't
happen.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2022-12-02 15:30:14 +00:00
Yong Zhi a4e5fea520 topology2: Add rt5682+max98357a support
Add sof-mtl-max98357a-rt5682 topology which supports
RT5682 headset and MAX98357A speaker amplifiers.

Signed-off-by: Yong Zhi <yong.zhi@intel.com>
2022-12-02 15:09:56 +00:00
Jaroslaw Stelter ddc325b02b audio: Remove ace_v1x-regs dependency.
The ace_v1x-regs.h Zephyr header file should be removed.
This patch removes dependency on this header in SOF code.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2022-12-02 13:25:31 +00:00
Seppo Ingalsuo da74953805 Audio: SRC: Compact the generic C FIR core
This patch compacts the FIR code a bit per discussion in other SRC
refine patch review where the current pointer arithmetic and code
style was not liked. There is no measurable MCPS impact in the 2ch
and Nch versions of core. It's not slower than original, but possibly
one perf comp_copy trace unit faster (0.03%).

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2022-12-02 13:24:37 +00:00
Ranjani Sridharan b0c5b08d63 topology2: sof-ace-tplg: Rename sof-mtl-sdw
To it's actual name sof-mtl-rt711-4ch.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2022-12-02 13:13:25 +00:00
Ranjani Sridharan 3a98634714 topology2: avs-tplg: Build ADL nocodec tplg
This will avoid having to rename the TGL tplg on ADL devices.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2022-12-02 13:13:25 +00:00
MARUTHI MACHANI 4adf78d458 platform:amd:support for full sync mode
enabling full sync mode for amd platform.

Signed-off-by: MARUTHI MACHANI <maruthi.machani@amd.com>
2022-12-02 12:37:00 +00:00
Andrey Borisovich 687c6f305e .github: workflow: removed legacy RTOS platforms from Zephyr build
Legacy platforms not meant to work with Zephyr were added
in commit ".github: compile-test multiple zephyr revisions + IPC4"
(8543f5c889).
Removed them from CI as they never should be built in the first place.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
2022-12-02 12:36:15 +00:00
Seppo Ingalsuo 689b91e6f2 Tools: Topology1: Add sof-hda-generic topology with SRC
This patch adds to sof-hda-generic.m4 macros HSSFX, HSSFX_FILTER1,
and HSSFX_FILTER2 those can be used to customize stream effect
for PCM 30. The macro defaults to volume so the default topology
build is not impacted.

The CMakeLists.txt in development is updated to build topologies
sof-hda-generic-src.tplg, sof-hda-generic-2ch-src.tplg, and
sof-hda-generic-4ch-src.tplg. The stream effect is set with HSSFX
to src-volume.

The pipeline pipe-host-src-volume-playback.m4 is added. It is similar
as pipe-host-volume-playback.m4 but a sample rate converter (SRC)
is added after PCM, before volume. The PCM capability is changed to
min 8000, max 192000 Hz.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2022-12-02 12:33:56 +00:00
Krzysztof Frydryk ba209af7b6 platform: ace: Enable fast clock on platform init
Uze zephyr clock controller to set fastest CPU clock on platform init.

Signed-off-by: Krzysztof Frydryk <krzysztofx.frydryk@intel.com>
2022-12-02 12:15:10 +02:00
Krzysztof Frydryk 5faacc0cff platform: ace: Enable zephyr native clock control
Enable zephyr clk driver allowing for cpu clock source change

Signed-off-by: Krzysztof Frydryk <krzysztofx.frydryk@intel.com>
2022-12-02 12:15:10 +02:00
Jaska Uimonen 24c0aad832 tgl: ipc4: zephyr: move to native drivers
Set tgl ipc4 overlays to use zephyr native drivers.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2022-12-01 19:20:06 +02:00
Ranjani Sridharan 6dfdfe9a02 ipc4: helper: disable interrupts during module binding
Disable interrupts until the intermediate buffer is connected to both
the source and the sink components during module binding. This is needed
to prevent IPC timeouts caused due to the IPC task getting preempted
when the buffer is only connected to the source and the sink has not
been connected yet. Disabling interrupts is good enough because at the
moment SOF only supports running all connected pipelines on the same
core.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2022-12-01 19:13:18 +02:00
Ranjani Sridharan 5b789f1d0a ipc4: helper: prevent memory leak in error path in ipc_comp_disconnect()
Unbind both source and sink components and free the buffer even in case
of errors to prevent memory leaks.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2022-12-01 19:13:18 +02:00