platform: ace: Enable zephyr native clock control

Enable zephyr clk driver allowing for cpu clock source change

Signed-off-by: Krzysztof Frydryk <krzysztofx.frydryk@intel.com>
This commit is contained in:
Krzysztof Frydryk 2022-11-22 13:07:18 +01:00 committed by Kai Vehmanen
parent 24c0aad832
commit 5faacc0cff
2 changed files with 11 additions and 1 deletions

View File

@ -65,4 +65,5 @@ CONFIG_PM_DEVICE=y
CONFIG_PM_DEVICE_RUNTIME=y
CONFIG_PM_DEVICE_POWER_DOMAIN=n
CONFIG_COMP_KPB=y
CONFIG_CLOCK_CONTROL_ADSP=y
CONFIG_CLOCK_CONTROL=y

View File

@ -11,9 +11,17 @@
#include <sof/common.h>
#include <sof/lib/memory.h>
#include <rtos/spinlock.h>
#include <zephyr/device.h>
#include <zephyr/drivers/clock_control.h>
static SHARED_DATA struct clock_info platform_clocks_info[NUM_CLOCKS];
static int select_cpu_freq(int clock, int hz)
{
return clock_control_set_rate(DEVICE_DT_GET(DT_NODELABEL(clkctl)), NULL,
(clock_control_subsys_rate_t)hz);
}
void platform_clock_init(struct sof *sof)
{
uint32_t platform_lowest_clock = CPU_LOWEST_FREQ_IDX;
@ -30,6 +38,7 @@ void platform_clock_init(struct sof *sof)
.lowest_freq_idx = platform_lowest_clock,
.notification_id = NOTIFIER_ID_CPU_FREQ,
.notification_mask = NOTIFIER_TARGET_CORE_MASK(i),
.set_freq = select_cpu_freq,
};
k_spinlock_init(&sof->clocks[i].lock);