switch the BCLK generation from shim ssp clock divider to
using SSCR0.SCR, as the divider may lead to jitter.
clear and remove M/N divider part code.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
for DMA controller, we need mask dsp local memory before
setting it to DMAC registers, otherwise, DMAC will locate
to wrong memory address.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
We need clear/reset buffer content to 0s each time
creating a pipeline buffer, to avoid random noise
when using it.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
On the linux driver side, it need get version infomation
from fw, including:
type -- Reef
version -- major.minor
build number
last commit id -- gID
So here we use the package string, which come from git
version, which can provide all those fw version infos.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
We are using 6 states, 2 of them are substates:
init, idle, running, paused,
draining(sub state when transferring from running to idle)
pausing(substate when transferring from running to paused).
Don't response new command when in substates, only stay in
substates for limited timeout. e.g. 2ms for draing and 1ms
for pausing.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
The DMA controller needs to differentiate between host and DSP memory
regions. This can be done with a mask that is ORed with local DSP memory
locations.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
This project provides an open source audio firmware infrastructure for audio
DSPs found on many modern devices. The intention is to allow developers to
create their own codecs, audio processing algorithms and pipelines using
the infrastructure and audio components provided by this project.
The project currently supports the Intel Baytrail and Cherrytrail audio DSP
platforms which use the Xtensa architecture.
The firmware source code is released under the BSD 3 clause licence.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Keyon Jie