OrgACRN
/
sof
mirror of https://github.com/thesofproject/sof.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

cht: Add M/N dividers for 19.2MHz 

Add some M/N divider entries for 19.2M source clock.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
This commit is contained in:
Liam Girdwood 2016-10-20 15:44:14 +01:00
parent eb042a4241
commit e00e51697a
1 changed files with 5 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/platform/baytrail/platform.c
View File

@ -100,12 +100,17 @@ struct ssp_mn {
uint32_t n;
};
/* TODO: move over to the PLL instead of M/N */
static const struct ssp_mn ssp_mn_conf[] = {
{25000000, 24, 48000, 1152, 25000}, /* 1.152MHz */
{25000000, 32, 48000, 1536, 25000}, /* 1.536MHz */
{25000000, 64, 48000, 3072, 25000}, /* 3.072MHz */
{25000000, 400, 48000, 96, 125}, /* 19.2MHz */
{25000000, 400, 44100, 441, 625}, /* 17.64MHz */
{19200000, 24, 48000, 3, 50}, /* 1.152MHz */
{19200000, 32, 48000, 2, 25}, /* 1.536MHz */
{19200000, 64, 48000, 4, 25}, /* 3.072MHz */
{19200000, 400, 44100, 441, 480}, /* 17.64MHz */
};
/* set the SSP M/N clock dividers */