Commit Graph

8993 Commits

Author SHA1 Message Date
Marc Herbert 19d2fbb625 west.yml: remove self.path: sof
The intent was to stop people from cloning the sof manifest git repo
under a different name than "sof". It did not work, I had to help
multiple people who did it anyway.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2022-11-09 14:15:07 +00:00
Marc Herbert d95004a62e xtensa-build-zephyr.py: trivial re-use of rimage_source_dir variable
Removes some minor duplication.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2022-11-09 14:15:07 +00:00
Jaroslaw Stelter 2786fedcb5 mux: fix FW build with xt-clang
Newer Xtensa toolchain replaces xt-xcc with xt-clang.
For some reason xt-clang fails to build SOF when uint8_t type
is used as index of for() loop. This change unblocks building of
SOF with xt-clang.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2022-11-09 12:44:52 +00:00
Ranjani Sridharan cd8a71dee5 pipeline-xrun: Reset pipeline when xrun occurs
When a pipeline runs into an xrun, the state of the pipeline will be
left as COMP_STATE_ACTIVE. Following this, when the application detects
the xrun, it will try and stop the pipeline. This will result in a
failure because the pipeline task has already completed and the state is
ACTIVE. This will lead to the PIPELINE_DELETE IPC fail as well and the
MOD_DX IPC fail because there are pipelines that are in the active
state. To prevent this, reset the pipeline when an xrun occurs to leave
in a READY state for pipeline stop, delete and DSP D3 entry to succeed.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2022-11-09 12:36:55 +00:00
Ranjani Sridharan 6f48342f9c zephyr-ipc: Invoke platform_pm_runtime_power_off during D3
When entering D3, call the platform_pm_runtime_power_off to prevent the
IPC timeouts seen with the CTX_SAVE IPC seen on the host when using the
zephyr native IPC driver.

Add an empty definition for MTL to prevent compilation errors.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2022-11-09 12:27:57 +00:00
Kai Vehmanen a0d9a4e4ac west.yml: upgrade Zephyr to 2e66fac6d3ff
Total of 946 commits, including following related to
intel_adsp/sparse/dmic/xtensa:

728506df6f45 soc: intel_adsp/ace: wait for lpsram power up
7e0c1a81cb54 soc: intel_adsp/ace: remove z_delay from hpsram init
e3e24b266d2d soc: xtensa: intel_adsp: ace: Fix build when CONFIG_MP_NUM_CPUS=1
dbc366918d8f tests: Enable qemu_xtensa logging tests
2dc9257ae1ae drivers: dmic: remove invalid assert on dmic->created
a574957c7457 soc: xtensa: intel_adsp: ace: set number of cpus at boot
7ffc6c31b555 samples/boards: Add intel_adsp/code_relocation sample
e98a748ad24e soc/xtensa/intel_adsp/cavs: Support for code relocation
06990e69d676 soc/xtensa/intel_adsp/cavs: Expose linker script on include
8ac6f74a7de5 arch/xtensa: Enable code relocation
fb26f18ae1c3 soc/xtensa/sample_controller: Expose linker script on include
d7f46136e013 soc/xtensa: Use standard __data_start/__data_end markers
f5dc229bc5df drivers: wifi: esp32: add softap config
dd1c88d54862 dts: xtensa: intel: fix alh base addr for cavs25
1f6d6deaef44 sparse: fix sparse warnings found in sof compilation
af5fb91a6c1f soc: intel_adsp: ipc: Do not send message until previous one is acked
0a7c25e649d1 drivers: timer: intel_adsp: Update driver to use dts Kconfig symbol
b953ff1418d2 drivers: dmic: enable dmic mono configuration
bedc2e7ab436 drivers: dmic: remove soft_reset from dmic init flow
39c2007b04ec drivers: dmic: update dmic flow initialization
ba0617417a1d tests: intel_adsp: smoke: Convert CONFIG_MP_NUM_CPUS handling
f8fba49a4102 soc: xtensa: intel_adsp: Convert CONFIG_MP_NUM_CPUS handling
0ce0f43b36bd soc: xtensa: esp32: Convert CONFIG_MP_NUM_CPUS handling
9387d8689b32 soc: xtensa: esp32: Add CONFIG_SMP protection
ad05e795986f intel_adsp: mem_window: fix definition of memory windows
f09a3a1bd675 linker: intel_adsp: discard GNU-stack notes
5760fcc8ab42 soc: xtensa: esp32_net:
b09973c460e3 soc: intel_adsp/common: remove reference to hp_sram_pm_banks
a2cb4a7ce3b9 soc: intel_adsp/ace: always inline funcs to get memory bank cnt
3ffe2654268a soc: intel_adsp/common: only memcpy segment if needed
195db14400f2 soc: intel_adsp/ace: zero out memory at ram init

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2022-11-08 17:58:09 +02:00
Jaroslaw Stelter cc44a479b6 iadk_modules: IADK modules needs full config
IADK modules usually uses configuration parameters
passed by ipc4_base_module_cfg followed by proprietary
parameters known only by particular module code.
Therefore during such module initialization we need to pass
whole IPC4 buffer.
Previous change limited these data to ipc4_base_module_cfg
what could be not enough for some 3rd party modules.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2022-11-08 15:32:12 +00:00
Jaroslaw Stelter 63c7b52962 iadk_modules: Add new ops initialization for IADK
IADK modules must have get_attribute function initialized.
Initialize also set_large_config and get_large_config to generic
module adapter calls.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2022-11-08 15:32:12 +00:00
Ranjani Sridharan b72a11d29b cavs: dma: Add device nodes for link DMA
Add the device nodes for HDA link DMA when using the native zephyr
drivers.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2022-11-08 13:49:17 +00:00
Baofeng Tian 066818eb08 Volume: optimize volume module for better performance
Volume module support per channel volume adjust, a dedicated
circular buffer designed for store per channel gain 4 times
for SIMD calculation. However, it is not must to store gain for
each time calculation, add a flag to indicate and decide the copy
action.

Below is the logs for before and after opt, around 5% optimized:
perf comp_copy samples 48 period 1000 cpu avg 249 peak 254
perf comp_copy samples 48 period 1000 cpu avg 236 peak 245

Signed-off-by: Baofeng Tian <baofeng.tian@intel.com>
2022-11-08 13:37:03 +00:00
Rander Wang 14d173b4ae ipc4: fix fw panic in d0i3 test
pm_runtime_get | put can't be called by ipc
msg directly. According to ipc3 implementation,
pm_runtime_enable | disable are fit for d0i3 msg.

Signed-off-by: Rander Wang <rander.wang@intel.com>
2022-11-08 15:35:32 +02:00
Libin Yang 691b80261a topology2: add payload_with_output_fmt token
payload_with_output_fmt token is used to tell sof driver whether
there is output audio format in the init instance ipc4 message
payload. payload_with_output_fmt = 1 mean there is audio output
format in the ipc4 message payload.

Signed-off-by: Libin Yang <libin.yang@intel.com>
2022-11-08 13:34:08 +00:00
Pierre-Louis Bossart a5635e0011 topology1: add missing ES8336 topologies for ICL
This needs to be added in sof-bin.

Link: https://github.com/thesofproject/linux/issues/3873
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2022-11-08 13:31:26 +00:00
Ranjani Sridharan dd58f5ba1d topology2: cavs-passthrough-hdmi: Add support for chained DMA
Add support for chained DMA pipelines in the HDMI passthrough topology.
Since the HDA hardware does not support S24_LE, remove the format from
the PCM capabilities for all the HDMI PCM's as well.

This version should work even if the kernel does not support chained DMA
as yet.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2022-11-08 13:30:43 +00:00
Kai Vehmanen 42433cae83 ipc4: fix asserts in ipc_compound_pre_start and msg_done
In review of commit 76e35fbec2 ("ipc4: use atomic primitives to
maintain delayed_reply state"), we had a debate whether 'delayed_reply'
was really a counter at all, or should it be a boolean. As a compromise,
we kept it as a counter, but added asserts on its expected values.

Now soon after, the SOF driver started using compound SET_PIPELINE_STATE
calls, which led to 'delayed_reply' really becoming a counter now due to
loop in ipc4_set_pipeline_state().

The code is correct, but now the assert statements are no longer
correct, so remove them.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2022-11-08 13:29:14 +00:00
Tinghan Shen 075b880506 platform: mt8186: Revise mt8186 clock flow
Add the missing necessary delay after changing DSP bus frequency.

Change the core frequency when initialize clock to avoid
altering the core frequency in the middle of execution.

Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
2022-11-08 13:16:58 +00:00
Tinghan Shen 1068079a4c platform: mt8186: Init ADSP PLL and ADSP bus clock
Initialize the mt8186 ADSP PLL before change ADSP core
to high frequency because the clock source of high
frequency is coming from ADSP PLL.

Because the ADSP bus source switches to the EMI clock,
the ADSP local bus clock should switch to 26M.

Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
2022-11-08 13:16:58 +00:00
Tinghan Shen 161e6b7b1a platform: mt8186: Change ADSP max clock frequency
Change the maximum frequency to 300M because power issue.
The mt8186 supports 800M/400M/300M frequencies, each requires
0.8/0.7/0.65 minimum core voltages. The 300M is the most
compatible option because it has the lowest minimum core voltage.

Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
2022-11-08 13:16:58 +00:00
Ranjani Sridharan d259d1bd59 dai-zephyr: Free DMA config block during reset
This prevents memory leaks during repeated PCM start/stop tests.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2022-11-07 12:22:43 +02:00
Ranjani Sridharan 6517743873 lib: dma: return NULL when DMA init fails
Return NULL when dma_init() fails.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2022-11-07 12:22:43 +02:00
Ranjani Sridharan d7ed871ac0 lib: dma: free dma channels when ref count is 0
Free the memory allocated for DMA channels when the ref count is 0 when
using native zephyr drivers.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2022-11-07 12:22:43 +02:00
Przemyslaw Blaszkowski 4ab225b5a7 init: check dma domain ptr before use
Check DMA domain pointer before calling scheduler_init_ll().
DMA domain is currently not initialized for MTL platform, but
there may be need to use in the future.
Without this check, secondary core crash on NULL pointer.

Signed-off-by: Przemyslaw Blaszkowski <przemyslaw.blaszkowski@intel.com>
2022-11-04 21:03:22 +02:00
Gongjun Song fc825a9ecb topology1: Add sof-rpl-rt711-l2-rt1316-l01-rt714-l3
Audio hardware configuration of SKU 0C40 product is rt711 on link2,
two rt1316s on link0 and link1 and rt714 on link3

Signed-off-by: Gongjun Song <gongjun.song@intel.com>
2022-11-04 20:57:15 +02:00
Gongjun Song 11baeefd94 topology1: Add sof-rpl-rt1316-l12-rt714-l0
Audio hardware configuration of SKU 0C10 product is rt714 on link0,
two rt1316s on link1 and link2

Signed-off-by: Gongjun Song <gongjun.song@intel.com>
2022-11-04 20:57:15 +02:00
Gongjun Song 7c47f6aa55 add some missing topologies in v5.19/CMakeLists.txt
Add missing adl SoundWire NOJACK topologies in
v5.19/CMakeLists.txt

Signed-off-by: Gongjun Song <gongjun.song@intel.com>
2022-11-04 20:57:15 +02:00
Tomasz Leman 7628908d0d mtl: power: enabling zephyr power manager
Enabling zephyr power management functionalities for meteorlake board.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2022-11-04 20:48:41 +02:00
Tomasz Leman a340fdf1ad ace: cpu: compilation error fix
Adding missing header: rtos/wait.h

The error appears in meteorlake after enabling power management.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2022-11-04 20:48:41 +02:00
Tomasz Leman 71fd3b34ea zephyr: power: preventing lower power states
D3 (PM_STATE_SOFT_OFF) state can be only entered after IPC request from
host. That why this prevent should be permanent.

D0i3 (PM_STATE_RUNTIME_IDLE) can be entered if host allows it and under
special conditions. State is prevented by default. Host will remove this
prevent with dedicated IPC message.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2022-11-04 20:48:41 +02:00
Tomasz Leman b0fbf3acfb ace: power: handling d0i3 prevent
This patch adds functions that allow to set/unset prevent on dynamic
power gating.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2022-11-04 20:48:41 +02:00
Tomasz Leman b755b012bf ace: power: add custom power policy
This patch introduce custom power management policy for ace platforms.
Default version depends mainly on system tick. Definition on the
application side will allow later for better customization.

When CONFIG_PM_POLICY_CUSTOM is set, kernel expect that application will
provide custom policy implementation.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2022-11-04 20:48:41 +02:00
Kai Vehmanen eec3e123a4 audio: up_down_mixer: add stubs for generic ANSI C version
The up_down_mixer currently depends on Hifi3 intrinsics and
there is no generic ANSI C version provides. This leads to CI
build errors with Zephyr SDK toolchain version, which doesn't
support Hifi/XCC extensions.

Add stubs for the generic implementation to allow the CI
build checks to pass. Code will raise a panic if execution
is attempted as the implementation is missing.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2022-11-04 15:44:07 +00:00
Kai Vehmanen 4ec3cfa13f audio: up_down_mixer: fix build warnings on discarding const
Fix compiler warnings on discarding const when passing
arguments to init_up_down_mixer [-Werror=discarded-qualifiers].

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2022-11-04 15:42:58 +00:00
Kwasowiec, Fabiola 1dffde13ba src:change error to warning when checking buffer
PR to change the error into a warning
is a good quick compromise
until a better limit is figured out

Signed-off-by: Kwasowiec, Fabiola <fabiola.kwasowiec@intel.com>
2022-11-03 22:33:22 +02:00
Jaska Uimonen b738c5e8f2 dai-zephyr: add dma config after stop
In pause/release triggering, if dma is stopped it needs to do set_config
before start. Otherwise the dma state prohibits the start.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2022-11-03 15:01:08 +02:00
Arsen Eloglian e2656958a3 mtl: enable comp up down mixer
Enable flag configures up down mixer.

Signed-off-by: Arsen Eloglian <ArsenX.Eloglian@intel.com>
2022-11-02 21:16:49 +02:00
Liam Girdwood 367580f335 Revert "topology2: cavs: Add chained DMA support for HDMI pipelines"
This reverts commit aed76b5a60.
2022-11-02 19:08:26 +02:00
Jaska Uimonen 1bfe89640c module_adapter: do proper sparse_force casting
Buffers allocated need to be sparse_force casted when assigning to
sparse_cache typed variables.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2022-11-02 19:07:39 +02:00
Jaska Uimonen 03360c6f8a module_adapter: buffer needs to be acquired and released
Fix sparse warning about wrong address space by acquiring and releasing
the buffer.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2022-11-02 19:07:39 +02:00
Jaska Uimonen ab3c156d44 eq_fir: fix functions arguments for sparse_cache
Fix sparse warnings about wrong address space.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2022-11-02 19:07:39 +02:00
Andrula Song d15474e67e Audio: replace the IIR lib used by EQ and TDFB with DF1
Compared with DF2T, the DF1 has better performance on low frequency and
saves about 9.9% cycles on HiFi3 version, so select DF1 instead of DF2T
as the default IIR lib for component EQ and TDFB.

Signed-off-by: Andrula Song <xiaoyuan.song@intel.com>
2022-11-02 12:36:25 +00:00
Laurentiu Mihalcea 1daedbf646 Introduce Zephyr DMA domain as experimental feature
This series of changes allows developers to enable DMA
domain on Zephyr. Currently, this feature is marked as
experimental because it still requires a lot of testing
and bug fixes.

In the case of i.MX, these changes still allow the usage
of dma_multi_chan_domain in conjunction with ll_schedule
if so desired. This is done because the feature is still
experimental and once it becomes more stable the appropriate
changes will be done in order to make DMA domain the
default option.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2022-11-02 12:34:34 +00:00
Laurentiu Mihalcea 0af35b5778 schedule: zephyr_ll: Remove timer domain restriction
The purpose of this patch is to allow zephyr_ll to be used
with multiple domains. Previously, zephyr_ll only allowed
the usage of timer domain.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2022-11-02 12:34:34 +00:00
Laurentiu Mihalcea db6d1bdb5d schedule: zephyr_ll: Use domain_task_cancel on zephyr_ll_task_cancel
The purpose of this patch is to allow the domain to know whenever a
task gets cancelled. As of now, this is only used by the DMA domain
in order to know when the DMA IRQs get shut down (sch->n_tasks == 0).

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2022-11-02 12:34:34 +00:00
Laurentiu Mihalcea 0b43b81127 zephyr: schedule: Add DMA domain
This patch introduces DMA domain on Zephyr.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2022-11-02 12:34:34 +00:00
Laurentiu Mihalcea 6b819755c9 include: schedule: ll_schedule_domain: Introduce domain_task_cancel
The purpose of this patch is to introduce a new domain operation:
domain_task_cancel.

The purpose of this new domain operation is to let the domain know
that a task has been cancelled. As of now, this is only used by
the preempt domain in order to know if the DMA IRQs got shut
down (meaning, sch->n_tasks == 0).

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2022-11-02 12:34:34 +00:00
Jaska Uimonen d0caf9c917 dai-zephyr: check for NULL in functions
Check for NULL in init_delay and fifo functions. These are called in
very early stage when dai might not be set. Thus fix it and align with
legacy.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2022-11-02 12:33:39 +00:00
Seppo Ingalsuo 63b84974fe Math: Rename macros INT_MAX and INT_MIN
The macro names in sof/math/numbers.h conflict with C library
so they must be renamed. New macro names are
INT_MAX_FOR_NUMBER_OF_BITS() and INT_MIN_FOR_NUMBER_OF_BITS().

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2022-11-01 15:35:04 +00:00
Guennadi Liakhovetski 399fe1980b ipc: (cosmetic) remove 3 empty lines
Remove 3 redundant empty lines in ipc-common.c

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2022-11-01 15:34:42 +00:00
Guennadi Liakhovetski 9dff0a15f3 iadk: fix a function assignment
When a pointer to a function is used the assignment can take one of
two forms:
ptr = fn;
or
ptr = &fn;
however, I don't think an assignment of the form
ptr = *fn;
is valid and passes compilation. Fix one such assignment.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2022-11-01 15:34:42 +00:00
Ranjani Sridharan aed76b5a60 topology2: cavs: Add chained DMA support for HDMI pipelines
Add a new pipeline chain-dma-playback.conf for chained DMA playback
and use it for HDMI depending on the HDMI_CONFIG.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2022-11-01 14:20:11 +00:00