Commit Graph

3424 Commits

Author SHA1 Message Date
Janusz Jankowski 15065eb01c cmake: add sof_add_static_library utility function
Adding static libraries properly may be troublesome for developers
that are not familiar with CMake, so function that makes it easier
should be useful.

Usually developer will just add sources directly to the target.
Using static libraries should be limited just to closed / precompiled
3rd party components.

Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
2019-08-09 16:44:50 +02:00
Janusz Jankowski ea71535a7e cmake: interface library for sof static libraries
Target dependencies have to be added in the same CMakeLists in which
they are declared. CMake interface library is needed to enable adding
static libraries to sof target from subdirectories.

Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
2019-08-09 16:44:50 +02:00
Daniel Baluta 788000fb7c imx8: dai: Initialize esai spinlock
ESAI implementation is still dummy, anyhow we need to initialize ESAI
spinlock in order to avoid FW crashes.

Similar with commit 2ee7a24f97 ("byt: hsw: ssp: move spinlock init
to earlier stage") we initialize the spinlock in an early stage at
dai_init.

We started to notice the crash after commit f7abaf7b33 ("spinlock:
allocate spinlocks in uncached memory") which requires that the lock
must be dynamically allocated at init. Before, the lock was statically
allocated and there were no crashes.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2019-08-09 16:13:01 +02:00
Paul Olaru 92d0cbb80f dai: Remove unused DAI_TRIGGER_ definitions
These definitions were in fact invalid. Drivers should use
COMP_TRIGGER_ symbols instead.

Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
2019-08-09 15:36:29 +02:00
Pierre-Louis Bossart 52e4b00908 kmod_scripts: handle renaming of pci/apci SOF modules
sof-pci-dev and sof-acpi-dev were renamed, so make sure we handle the
new names. The old ones are kept for backwards compatibility but will
be removed at some point.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2019-08-09 12:09:19 +02:00
Pierre-Louis Bossart 753a76bbfa kmod_scripts: handle rt700/soundwire machine driver
In theory we wouldn't need to explicitly load the rt700 driver but
doing so solves a race condition we will have to fix in the kernel at
some point.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2019-08-09 12:09:19 +02:00
Pierre-Louis Bossart 07353fda88 kmod_scripts: handle max98090 codec
This is required for Cherrytrail/Baytrail Chromebooks.

Note that the driver still has problems but the scripts are fine.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2019-08-09 12:09:19 +02:00
Janusz Jankowski 62b59ce762 cmake: link sof libraries as private
In function target_link_libraries visibility modifiers have to be
consistent, otherwise we will get error while trying to use modifier,
if it wasn't used in root CMakeLists.

Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
2019-08-08 13:54:14 +02:00
Tomasz Lauda ac3d83aeba dma: fix DMA_ACCESS_EXCLUSIVE
Fixes DMA_ACCESS_EXCLUSIVE flag for getting DMA.
We should rely on number of DMA users rather than
number of DMA channels. DMA channels are incremented
during DAI config, so it can potentially happen long
after DAI creation.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-08 09:55:39 +03:00
Seppo Ingalsuo 77ecea1626 EQ IIR: Add HiFi3 optimized version
This patch adds for HiFi3 xt-xcc compilation for an intrinsics
optimized direct form-II transposed (df2t) filter core version
that executes faster than the generic C version.

Due to HiFi3 instruction set the delay lines are changed from Q3.61
to Q17.47 format. It causes differences in bit-exactness but no
practical audio quality difference to generic C version.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2019-08-07 16:30:29 +02:00
Seppo Ingalsuo 68fd2b817d EQ FIR: Bug fix for HiFi3 optimized implementation
This patch fixes two similar mistakes from all the s16/s24/s32 dual
sample computing FIR core that was introduced in a previous update.
The FIR processing frames count processed double amount of samples
in buffer that corrupted FIR delay line and also the output write
to component sink buffer swapped two successive samples within one
channel.

The filter cores for s16 and s24 were simplified a bit since they can
use single output write pointer.

The FIR header file used wrong xtensa header file for HiFi2 while
it should have been for hifi3. Though no issues were observed due to
this mistake.

A check for frames count greater than zero was added into the copy()
function for extra safety. Also the return value from
comp_get_copy_limits() is not checked since the function always
returns zero.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2019-08-07 14:58:22 +02:00
Tomasz Lauda ff02f2f008 spinlock: fix locking
Fixes locking mechanism of spinlocks.
Current implementation hasn't worked at all,
so there wasn't any synchronization between cores.
I myself have broken it a long time ago.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-07 14:22:52 +02:00
Tomasz Lauda f7abaf7b33 spinlock: allocate spinlocks in uncached memory
Spinlocks need to be allocated in uncached memory region
in order to work properly and allow synchronization between
multiple cores. Atomic instructions used in xtensa implementation
don't go through cache automatically.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-07 14:22:52 +02:00
Tomasz Lauda d31b7352d4 init: move interrupt_init after init_heap
Moves interrupt_init after init_heap. During interrupt
initialization we need to allocate spinlock, so we need
already initialized memory map.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-07 14:22:52 +02:00
Tomasz Lauda 2ee7a24f97 byt: hsw: ssp: move spinlock init to earlier stage
Moves spinlock initialization for byt and hsw platforms
to earlier stage. Otherwise the output will be undefined,
since we are using the spinlock before initializing it
in platform_init sequence.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-07 14:22:52 +02:00
Tomasz Lauda 9a6616a89b spinlock: replace spin_lock_* with irq_local_*
Replaces spin_lock_* macros with irq_local_* macros
in many places. Most of the code doesn't need to keep
synchronization between cores. Setting critical section
by disabling local interrupts is enough. Spinlocks should
be used only in the places, where both cores have access.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-07 14:22:52 +02:00
Tomasz Lauda fe4ef2843c interrupt: add irq_local_enable and irq_local_disable macros
Adds irq_local_enable and irq_local_disable macros to disable
and enable all IRQ sources for current core.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-07 14:22:52 +02:00
Ranjani Sridharan ee194890b5 scripts: add option to build fuzzer
Enable building the fuzzer with the -f option
in the build-tools.sh script.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2019-08-07 08:47:58 +02:00
Ranjani Sridharan 2f9b43bac0 tools: fuzzer: Introducing ingredients for fuzzing in SOF
This commit introduces the ingredients required for adding
fuzzing support in SOF. The main ingredients are as follows:

QEMU bridge: This creates the IO bridge to communicate with
the QEMU DSP

Core IA host support for BYT/CHT platforms: Provides the host
support for intializing the platform and communicating with
the QEMU DSP

Main application: The fuzzing application that sets up the
platform and initializes the communication with the QEMU DSP

Currently, running the fuzzer application only sets up the
platform IO bridge for communicating with the QEMU DSP,
boots the FW, parses the topology file and sets up the components
and connections in topology by sending the IPC messages to
the QEMU DSP. The next step is to add the fuzzing component
which will be responsible for sending fuzzed IPC messages
and monitoring the status.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2019-08-07 08:47:58 +02:00
Ranjani Sridharan c8b39dc9d6 testbench: Support reuse of topology parser
The topology parser in testbench can be re-used for
the other applications like the fuzzer. In order to
accomplish this, this commit does the following:
1. Separate the topology parser into a separate project
(tplg_parser) which implements the callbacks for parsing
all the components in topology.
2. Add support for parsing new components such as host
pcm, dai and mixer
3. Include the topology parser as an external project
in the testbench.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2019-08-07 08:47:58 +02:00
Tomasz Lauda 9e2aa3d3ac alloc: fully synchronize memory map between cores
Adds cache operations to alloc functions to get full
synchronized memory map between different cores.
Memory allocations aren't done so often so we can
afford to go through cache and perform so many
wtb/inv operations. This change allows slave cores
for allocation from runtime heap, buffer heaps etc.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 20:52:53 +02:00
Tomasz Lauda 976b9d647a timer: cavs: add missing labels for TIMER4
Adds missing switch labels for TIMER4.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 18:59:27 +01:00
Tomasz Lauda 4de76bf578 timer: change id values
Refactors timer a little bit, to make better usage
of timer id values. Right now every timer has also irq
field, which is used to identify which interrupt line
to enable/disable. We don't longer need timer id to represent
also timer irq, so let's set custom ids and simplify
things.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 18:59:27 +01:00
Tomasz Lauda ec9d1cad94 schedule: make some functions static inline
Transforms some of the short functions to static inline.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 18:51:20 +01:00
Tomasz Lauda b3233c435e schedule: remove functions forward declarations
Removes not needed forward declarations of the functions.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 18:51:20 +01:00
Tomasz Lauda 4100fa0ac3 schedule: make schedule functions return task state
Instead of returning next period, schedule functions should return
state of the executed task. Period of the tasks is set during
initialization and doesn't change dynamically, so it doesn't make
sense to return it. With the new added SOF_TASK_STATE_RESCHEDULE
we can easily decide if the task is completed or maybe need to
be run once again.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 18:51:20 +01:00
Tomasz Lauda 8920419137 task: reorder task structure
Reorders task structure in order to gain better padding
and don't waste any space.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 18:51:20 +01:00
Tomasz Lauda f4c6d35761 task: make enum from task states
Makes enum from task states for better type
enforcement in the future.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 18:51:20 +01:00
Tomasz Lauda 99005e21bc schedule: extract flags to generic task data
Extracts flags to generic task data, so there is no need
for ll_schedule to keep them privately. Also changes the
way they are passed. From now on flags should be set only
during task initialization and not when starting scheduling.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 18:51:20 +01:00
Tomasz Lauda 2d16db19de ll_schedule: keep task period in private data
Adds new period field to task private data to keep
period set during schedule. Tasks shouldn't change
their period dynamically and in fact there is no
such task.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 18:51:20 +01:00
Tomasz Lauda 8309e53e6c ll_schedule: decrease code of schedule and reschedule
Decreases code of schedule and reschedule functions by
removing small helper methods, which weren't needed.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 18:51:20 +01:00
Tomasz Lauda 8025432217 schedule: writeback and invalidate tasks
Adds cache operations in task init and schedule functions.
It allows to put tasks' private data in cached memory, which
will be needed in the near future with new EDF implementation.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 18:51:20 +01:00
Tomasz Lauda 79dfc19a4b cpu: add cpu_is_slave method
Implements cpu_is_slave helper method, which checks
whether the provided core is slave.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 18:51:20 +01:00
Tomasz Lauda b201fc77f0 cpu: use cpu_get_id instead of arch version
Changes usage from arch_cpu_get_id to cpu_get_id.
We always should go through generic function version.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 18:50:50 +01:00
Tomasz Lauda 4563f2c12d pipeline: add function for checking pipe execution core
Extracts check whether the pipeline should be executed
on the current core to separate method.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 18:50:50 +01:00
Tomasz Lauda f14a8a7049 ipc: access _ipc through uncached memory region during ipc send
Function responsible for putting FW notifications into the
queue is shared between all cores. In this function we should
access _ipc object only through uncached memory region to not cause
random data overwrite.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 18:50:50 +01:00
Tomasz Lauda 7b564fcbd6 idc: access _ipc object through uncached memory region
Changes accesses to the _ipc object to go through uncached
memory region. This way slave cores can safely read shared_ctx
without causing random overwrite of the data.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 18:50:50 +01:00
Tomasz Lauda 397c1a0d94 pipeline: move check for xrun
Moves xrun check in pipeline_trigger after checking
if this pipeline is running on current core. Only owner
of the pipeline should access its data.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 18:50:50 +01:00
Tomasz Lauda 39b59af35f idc: add missing cache invalidation
Adds missing comp_dev invalidation before accessing it.
We also need to move core check a little bit further,
since it also uses both comp_dev and pipeline objects.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 18:50:50 +01:00
Tomasz Lauda f5e9cf69e3 arch: xtensa: remove workaround for APL GCC compilation
Removes previously added workaround for APL GCC compilation.
Some of the coprocessor registers wasn't included in the
overlay. This patch will only work with the updated
xtensa-apl-overlay.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 13:54:05 +02:00
Tomasz Lauda 901be03a05 byt: update xtensa core headers
Updates xtensa core headers for byt and cht platforms.
The one previously used had wrong values for these
platforms.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 13:54:05 +02:00
Tomasz Lauda 312a7cdaee byt: cht: disable FIR and IIR components
Disables FIR and IIR components for byt and cht
platforms. These are not currently used, so we
can spare some space in IRAM.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 13:54:05 +02:00
Tomasz Lauda 5efd0c5e81 platform: byt: do not use vector addresses from core-isa.h
This patch copies vector addresses for baytrail platform
from core-isa.h to memory.h. This way we won't overwrite
default xtensa addresses, when updating xtensa headers.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-06 13:54:05 +02:00
Bartosz Kokoszko bdde5013e1 host: add traces with id's
Traces with id's help to read logs,
especially when there are several
pipelines in topology.

Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
2019-08-06 11:48:03 +02:00
Tomasz Lauda d0d4301c9c task: abstract slave core functions to arch layer
Abstracts slave core functions to arch layer. It doesn't
make sense to compile them, if they won't be used.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-05 13:59:10 +01:00
Tomasz Lauda f068ddd771 ll_schedule: fix possible race condition
Fixes very rare race condition, when multiple cores
schedule something in low latency scheduler. We should
allow for timer client to execute one more time after
being cancelled. There won't be any tasks on the list
to process, but at least we will stop everything
gracefully.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-05 13:56:10 +01:00
Tomasz Lauda ca45e75244 ll_schedule: zero queue by default
Changes ll_schedule_data allocation function from malloc
to rzalloc. It should be zeroed out in order to prevent
usage of any garbage data after slave core reenable
sequence.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-08-05 13:56:10 +01:00
Janusz Jankowski f837e57b6e test: mux calc_sample_s16le
Unit tests for calc_sample_s16le with up to 8 channels.

Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
2019-08-02 13:31:44 +02:00
Janusz Jankowski 1bf779eef7 test: mux calc_sample_s24le
Unit tests for calc_sample_s24le with up to 8 channels.

Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
2019-08-02 13:31:44 +02:00
Janusz Jankowski 21375d45a2 test: mux calc_sample_s32le
Unit tests for calc_sample_s32le with up to 8 channels.

Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
2019-08-02 13:31:44 +02:00