Commit Graph

6005 Commits

Author SHA1 Message Date
Pierre-Louis Bossart 12d5b1358e topology: intel-generic-dmic: add macro for PCM device names
Add macro to allow the use of "BufferedMic" instead of
"DMIC16kHz" in KPB usages.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2021-02-10 10:35:02 +00:00
Pierre-Louis Bossart 57d121238f topology: sof-smart-amplifier: fix error message
Confusion between input and output, and PCM name and pipeline ID.

Copy/paste likely here.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2021-02-10 10:35:02 +00:00
Pierre-Louis Bossart e24d77aa76 topology: remove sof-tgl-rt5682.m4
This file was used for early enablement of SoundWire on a platform,
before we had support for amplifiers. This is no longer needed, let's
remove it.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2021-02-10 10:35:02 +00:00
Pierre-Louis Bossart 9b355efab1 topology: remove sof-tgl-rt711-i2s-rt1308.m4
This topology is no longer used and productized, let's remove it.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2021-02-10 10:35:02 +00:00
Hans de Goede 86abd07cba topology: Add sof-byt-wm5102-ssp0 topology file
Add a topology file for Bay Trail boards with a WM5102 codec
connected to SSP0.

These setups works with the standard settings from sof-byt-codec.m4.

This has been tested on a Lenovo Yoga Tablet 2 1015L.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-02-10 10:32:09 +00:00
Bartosz Kokoszko 9a08028a76 timer_domain: set last_tick to ticks_req in order to avoid drift
In the case of scheduling irregularities the drift may accumulate in the
scheduling reference value. By ensuring we always refer to the previous
requested time the drift can be prevented.

Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
Signed-off-by: Slawomir Blauciak <slawomir.blauciak@linux.intel.com>
2021-02-10 09:49:58 +00:00
Curtis Malainey 10656d614c oss-fuzz: add error for incorrect build env and readme
add proper build instructions

Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
2021-02-09 13:52:30 +00:00
Marc Herbert 419806fb1c xtensa-build-all.sh: add PATH to build log
The script already logs the full CMake command that is re-usable outside
this script... except for the PATH change. Expose that sneaky PATH
change.

Debugging every build issue starts with peeling the too many layers of
indirection.

Also fix some minor issue in the help message.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2021-02-09 13:43:54 +00:00
Iuliana Prodan 789a286ace platform: imx: use DMA_DOMAIN in full synchronous mode
Use the full_sync attribute from dma_domain to schedule
tasks based on period ratio between the registrable
task and the current one.
Do not make it time dependent anymore.

Fixes: #3802

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2021-02-09 08:52:37 +02:00
Iuliana Prodan b732c4fb13 schedule: dma_multi_chan: do not skip tasks for dma_domain scheduler
Add a full_sync attribute to ll_schedule domain.
This is set to true, for a full synchronous dma_domain
scheduler, which is not time dependent.
By default, it is false.

In full_sync case we use the ratio between the task period
and the registrable task period to do the scheduling, not
the task.start time.

We do this because for the DMA_DOMAIN there are no guarantees
for the accuracy of the period of the registrable task
which drives the entire scheduling.

An example is the mixer topology where we have 3 pipelines
for playback scenario:
- 1 pipeline for pcm1.0 (task 0);
- 1 pipeline for pcm1.1 (task 1);
- 1 pipeline for DAI (task 2).
Task 2 is the registrable task and this is always scheduled.
The other tasks (task 0 and task 1) are scheduled based on task->start.

The problem is that, at some point, the DMA transfer from DAI is
finished earlier than task->start for one of the task 0 or task 1
and this is not scheduled anymore.
And, task 2 ends up depleting one of the source buffers,
thus blocking the entire data flow.

Fixes: #3802

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2021-02-09 08:52:37 +02:00
Jaska Uimonen 9d41d63ac7 mux: enable playback of multiple simultaneous streams
Currently you can't play multiple simultaneous streams at the same time
into mux. Fix this by copying the trigger and reset mechanism from audio
mixer.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2021-02-05 15:58:03 +00:00
Ranjani Sridharan a4cea81bd6 smart_amp_test: check if feedback_buf exists before accessing it
With dynamic pipelines, the widgets in the feedback path are set
up only when the capture PCM is opened. Check if the
feedback_buf exists before accessing it to prevent DSP panic
when only the playback pipeline is open.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2021-02-05 15:51:51 +00:00
Daniel Baluta 9af15389ee lib: Add __vec_memcpy / __vec_memset
3rd party libraries need __vec_memcpy / __vec_memset
which are not provided by xtensa gcc.

Add open coded versions of these functions by using
memcpy and memset.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2021-02-05 15:43:16 +00:00
Keyon Jie 6781f0dd41 topology: sof-tgl-nocodec-ci: use 38.4MHz MCLK
Define to use 38.4MHz MCLK for DSM, to align with other SSP ports.

Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
2021-02-05 13:09:01 +08:00
Guennadi Liakhovetski 372d3873bd zephyr: make sure non-atomic 64-bit timer is consistent
The Zephyr timer implementation reads high and low 32 bits
in a non-atomic way. Add a loop to make sure the read is
consistent.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2021-02-03 16:35:10 +00:00
Guennadi Liakhovetski 9ac38d8828 zephyr: fix regression: add platform_timer_get_atomic()
Recently added platform_timer_get_atomic() has to be
implemented for Zephyr too.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2021-02-03 16:35:10 +00:00
Guennadi Liakhovetski 80eadcd3c0 timer: rename platform_timer_get_noirq to platform_timer_get_atomic
The "noirq" suffix in function names is often used to signify,
that when this function runs, interrupts will not occur. See
e.g. suspend_noirq and other similar methods in the Linux kernel.
Use "atomic" to indicate, that the function itself will run
atomically.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2021-02-03 16:35:10 +00:00
Jaska Uimonen 71a4e98a27 mux: fix input and output channel setting
Input and output channel settings from matrix row and column
are in reverse order, so they should be swapped.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2021-02-03 15:58:24 +00:00
Liam Girdwood 70b447b534 cavs: timer: make timer recovery 10uS
This optimises the recovery time and reuses the same value
for overhead. Maybe optimised further, but value seems good
for all DSP clocks on cavs.

Also removes unused code.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2021-02-03 15:57:24 +00:00
Pierre-Louis Bossart 6126ccc626 topology: use DMIC gain boost similar to HDAudio topologies
We used the same macros in .m4 files but missed the additional
configuration needed in CMakeLists.txt

Reported-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2021-02-03 15:55:00 +00:00
Ranjani Sridharan 520625ea25 smart_amp: check if feedback_buf exists before accessing it
With dynamic pipelines, the widgets in the feedback path are set
up only when the capture PCM is opened. Check if the
feedback_buf exists before accessing it to prevent DSP panic
when only the playback pipeline is open.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2021-02-03 15:43:09 +00:00
Pan Xiuli 38dfb9e011 cavs: pm: change the timeout value to 2ms for HOST IPC handler
With a recent test result:

[ 9435.941365] sof-audio-pci 0000:00:1f.3: ipc rx: 0x90020000: GLB_TRACE_MSG
[ 9435.941392] sof-audio-pci 0000:00:1f.3: ipc tx: 0x40010000: GLB_PM_MSG: CTX_SAVE
[ 9435.942023] sof-audio-pci 0000:00:1f.3: error: DSP trace buffer overflow 4294967295 bytes. Total messages -1
[ 9435.942030] sof-audio-pci 0000:00:1f.3: ipc rx done: 0x90020000: GLB_TRACE_MSG
[ 9435.942118] sof-audio-pci 0000:00:1f.3: ipc tx succeeded: 0x40010000: GLB_PM_MSG: CTX_SAVE

IF a DSP sent IPC just arrived before IPC CTX_SAVE sent, the HOST IPC
handler may be delayed anda use about 1ms. Change the timeout value
to 2ms will be safer

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
2021-02-01 17:07:31 +00:00
Marc Herbert 51aa896e7c CODEOWNERS: /.github/ += @zrombel
As discussed in latest PR #3791

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2021-02-01 15:38:45 +00:00
Seppo Ingalsuo cb924991a5 Topology: HDA Generic: Headset filters configuration from CMakeLists.txt
This patch eases the definition of headset post processing filters
blobs. First, the macro name PPROC is changed to HSPROC to indicate
the processing targets headset endpoint.

The CMakeLists.txt for topologies is edited to add build of topology
sof-hda-generic-eq.tplg that does not include DMIC endpoints for
devices without such. Previously there was no variant without
DMIC enable.

The main macro sof-hda-generic.m4 is enhanced to define HSPROC as
volume to use pipeline pipe-volume-playback.m4 when it has not been
defined in CMakeLists.txt.

The definitions for PIPELINE_FILTERx are copied from endpoint specific
HSPROC_FILTERx if they were defined. If they were left undefined
the pipeline will apply default processing configuration (e.g.
for EQs pass-through).

In the example the EQs are left to pass-through. The topology
sof-hda-generic-eq.tplg shows an example of explicitly setting
the filter coefficients at the top level. The FILTER1 is impacts the
first algorithm in pipeline (IIR) and FILTER2 the second algorithm
algorithm (FIR) in the used HSPROC definition eq-iir-eq-fir-volume.
In this case volume does not support such but for future there could
be FILTER3, FILTER4, ... added if need. The current m4 macros support
now only HSPROC_FILTER1 and HSPROC_FILTER2.

The patch adds undefine to PIPELINE_FILTERx in intel-generic-dmic.m4 to
make sure the macro is not set by other than DMICPROC_FILTERx. The
same is done for 16 kHz DMIC capture. Currently there were no issues
caused by it.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2021-01-29 11:48:58 +00:00
Pierre-Louis Bossart 3658341a3f topology: sof-cml/icl-rt700: align DMIC support with HDaudio
Somehow we use different configurations for the DMIC, remove
everything in this file and rely on the same macros.

The only difference with HDaudio is the pipeline and PCM device
numbers.

the old topology names sof-icl-rt700 and sof-cml-rt700 alias to the
same 4ch topology, when the kernel looks for the 2ch or 4ch versions
we can remove it. Make then break.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2021-01-29 11:33:19 +00:00
Pierre-Louis Bossart cb23581048 topology: sof-tgl-rt711-rt1308: align DMIC support with HDaudio
Somehow we use different configurations for the DMIC, remove
everything in this file and rely on the same macros.

The only difference with HDaudio is the pipeline and PCM device numbers

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2021-01-29 11:33:19 +00:00
Marc Herbert 4dd431715d CODEOWNERS += /.github/
Add CODEOWNERS for /.github/

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2021-01-29 10:29:58 +00:00
Iuliana Prodan dcba48583e topology: imx8m: add mixer component with wm8960 codec
This topology works on i.MX8MP with wm8960 codec.
When loaded, one will have a sound card with two playback subdevices.
This way, samples pushed to the two subdevices will be mixed and
sent to SAI3 and then to wm8960 codec.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2021-01-28 22:56:45 +00:00
Iuliana Prodan f5b28cc151 topology: imx8: add mixer component with cs42888 codec
This topology works on i.MX8QM and i.MX8QXP with cs42888 codec.
When loaded, one will have a sound card with two playback subdevices.
This way, samples pushed to the two subdevices will be mixed and
sent to ESAI0 and then to cs42888 codec.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2021-01-28 22:56:45 +00:00
Iuliana Prodan 21e38421d7 topology: imx8: add mixer component with wm8960 codec
This topology works on i.MX8QM and i.MX8QXP with wm8960 codec.
When loaded, one will have a sound card with two playback subdevices.
This way, samples pushed to the two subdevices will be mixed and
sent to SAI1 and then to wm8960 codec.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2021-01-28 22:56:45 +00:00
Liam Girdwood b9faef1cb6 drivers: idc: let users know core boot failure reason.
Trace the result of any secondary core boot failures.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2021-01-28 22:50:30 +00:00
Liam Girdwood 9db16c146d align: linker: need alignment macro for the linker.
Fixes build for platforms where linker offsets are aligned.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2021-01-28 22:50:30 +00:00
Liam Girdwood 3e26ca0993 pm: memory: fix build for unused function
memory_banks_get() unused on APL when LPSRAM disabled.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2021-01-28 22:50:30 +00:00
Liam Girdwood 96fa4749ee idc: core boot: relax the idc wait to allow other cores access to IO
Currently idc_wait_in_blocking_mode() spins and reads timer and mailbox
IO which can slow down secondary core boot (which share the physical
resources).

Relax the IO to speed up booting of secondary cores.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2021-01-28 22:50:30 +00:00
Liam Girdwood 8a5bcd9df6 timer: scheduler: make all timer IO atomic in scheduler
Make all timer IO is atomic in the scheduler by adding a new
platform_timer_get_norq() API that validates 64 bit reads.
ALso make sure there is enough time for setting the new timeout
in the CAVS platforms.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2021-01-28 22:50:30 +00:00
Pan Xiuli 76ae4d3e16 cavs: pm: change the timeout value for HOST IPC handler
After checking the kernel log the HOST will always handle
and replay DSP sent IPC GLB_TRACE_MSG in about 40us.

set the FW side wait timeout to 100us to improve the performance
of DSP power switch.

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
2021-01-28 22:46:55 +00:00
Pan Xiuli 882ef66c68 cavs: pm: fix wrong usage of poll_for_register_delay
In current kernel logs the CTX_SAVE IPC will always take more than 10ms,
but before 0b2876b279 it only need less than 1ms. This patch fix the
wrong usage of always timeout for poll_for_register_delay.

IPC_DIPCIDR_MSG_MASK is the mask for msg from BIT 0 to 30 while
we want to check if BIT 31 is 0. now change the MASK and VAL to correct
values to make the poll and delay will return when there is no DSP sent
IPC.

fixes commit 0b2876b279 ("cavs: pm: poll for IPC_DIPCIDR_BUSY to be
clear before powerdown hpsram")

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
2021-01-28 22:46:55 +00:00
Ranjani Sridharan 37292a70be dmic: add spinlock during set_config op
Long run multiple pipeline tests fail during DMIC
config with dynamic pipeline set/up. Holding the dai
lock during DMIC config fixes the issue.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2021-01-28 13:28:15 +00:00
Ranjani Sridharan 6db728dfcf dma/dai: use spin_lock_irq/spin_unlock_irq during get/put
Long run multi pipeline tests fail with dynamic pipeline
setup when trying to enable/disable the DMA and DAI.
Disabling interrupts during get/put addresses this issue.

Suggested-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2021-01-28 13:28:15 +00:00
Marc Herbert 356cc852e1 Replace run-time ALIGN_UP() check by ALIGN_UP_COMPILE() where possible
Should save some cycles

See related PR #3739

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2021-01-28 13:21:48 +00:00
Marc Herbert 921e52c680 common.h: rename two alignment verification macros, add comments
Zero functional change.

Rename "is_non0_power_of_2(x)" to "is_power_of_2(x)" because it's
simpler and because zero is not a power of 2.

Rename "compile_fail_zero_or_true(x)" to "compile_assert()" because it's
much simpler and because I really couldn't find what "zero_or_true"
meant?

Add a few comments, especially explain why COMPILE_TIME_ALIGNED(align)
uses __builtin_constant_p(align) because it took me ages to figure it
out.

Also recommend ALIGN_UP_COMPILE() over ALIGN_COMPILE() when compiling
with -O0

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2021-01-28 13:21:48 +00:00
Marc Herbert cdee91d01e .github: rename workflow from "Github Action CI" to "Github Actions"
The singular "Action" makes it look like our workflow is an action. The
plural "Github Actions" is at least the name of the product; so it's
vague enough.

A technically acccurate name would be "Main workflow" but we have only
one so it would be useless plus we're next to "Jenkins" and others and
want to stay consistent with them.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2021-01-28 13:20:22 +00:00
Pin-chih Lin fdbb90e786 tools: topology: Add common Codec Adapter capture pipeline tplg
pipe-codec-adapter-capture.m4 is implemented as a common pipeline
module of a capture codec w/ Codec Adapter API.

For codec developers, a upper-layer tplg file should be provided for
the specified codec with the information of control bytes, schedule
core, and byte-control names.

Signed-off-by: Pin-chih Lin <johnylin@google.com>
2021-01-27 18:20:17 -08:00
Pin-chih Lin 1a2afeb552 tools: topology: Add common Codec Adapter playback pipeline tplg
pipe-codec-adapter-playback.m4 is implemented as a common pipeline
module of a playback codec w/ Codec Adapter API.

For codec developers, a upper-layer tplg file should be provided for
the specified codec with the information of control bytes, schedule
core, and byte-control names.

Signed-off-by: Pin-chih Lin <johnylin@google.com>
2021-01-27 18:20:17 -08:00
Pan Xiuli 76b3f1eaaf README.md: add GitHub action status badge
Add the status badge for GitHub action CI.

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
2021-01-27 21:40:31 +00:00
Pan Xiuli 76d2e10fa8 CI: GitHub action: change name shows on PR status
change name for the GitHub actions to make the status context name
show in PR check looks nicer

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
2021-01-27 21:40:31 +00:00
Pan Xiuli 893c6b94a8 CI: GitHub action: allow action check runs on more branch
allow to run the check on PR and push to release stable branch

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
2021-01-27 21:40:31 +00:00
Curtis Malainey 64540b85aa pipeline: fix log message
quoting wrong function name

Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
2021-01-27 21:38:58 +00:00
Liam Girdwood 8112cad6ce component: doxygen: add more content around prepare() and reset().
Add some more usage context around prepare() and reset() for developers.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2021-01-27 21:27:58 +00:00
Guennadi Liakhovetski e580ca538c schedule: build only one of single- and multi-channel DMA schedulers
Only cAVS platforms use the single-channel DMA scheduler, all
other platforms use the multi-channel one. Add Kconfig options
to only build one of them.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2021-01-27 21:26:50 +00:00