mirror of https://github.com/thesofproject/sof.git
topology: remove sof-tgl-rt5682.m4
This file was used for early enablement of SoundWire on a platform, before we had support for amplifiers. This is no longer needed, let's remove it. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
This commit is contained in:
Pierre-Louis Bossart
Liam Girdwood
parent
9b355efab1
commit
e24d77aa76
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@ -135,7 +135,6 @@ set(TPLGS
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"sof-tgl-nocodec\;sof-tgl-nocodec"
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"sof-tgl-rt711-rt1308\;sof-tgl-rt711-rt1308-2ch\;-DCHANNELS=2\;-DDMICPROC_FILTER1=eq_iir_coef_highpass_40hz_20db_48khz.m4\;-DDMIC16KPROC_FILTER1=eq_iir_coef_highpass_40hz_20db_16khz.m4"
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"sof-tgl-rt711-rt1308\;sof-tgl-rt711-rt1308-4ch\;-DCHANNELS=4\;-DDMICPROC_FILTER1=eq_iir_coef_highpass_40hz_20db_48khz.m4\;-DDMIC16KPROC_FILTER1=eq_iir_coef_highpass_40hz_20db_16khz.m4"
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"sof-tgl-rt5682\;sof-tgl-rt5682\;-DHDMI=1"
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"sof-tgl-nocodec\;sof-ehl-nocodec"
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"sof-ehl-rt5660\;sof-ehl-rt5660\;-DHDMI=1"
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"sof-ehl-rt5660\;sof-ehl-rt5660-nohdmi"
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@ -1,230 +0,0 @@
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#
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# Topology for Tigerlake with rt5682 headset codec
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#
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# Include topology builder
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include(`utils.m4')
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include(`dai.m4')
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include(`pipeline.m4')
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include(`alh.m4')
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include(`hda.m4')
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# Include TLV library
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include(`common/tlv.m4')
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# Include Token library
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include(`sof/tokens.m4')
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# Include Tigerlake DSP configuration
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include(`platform/intel/tgl.m4')
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include(`platform/intel/dmic.m4')
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DEBUG_START
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#
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# Define the pipelines
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#
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# PCM0 ---> volume ----> ALH 2 BE dailink 0
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# PCM1 <--- volume <---- ALH 3 BE dailink 1
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# PCM3 <----volume <---- DMIC01
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# PCM4 <----volume <---- DMIC16k
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ifelse(HDMI, `1',
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`
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# PCM5 ----> volume -----> iDisp1 (HDMI/DP playback, BE link 4)
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# PCM6 ----> volume -----> iDisp2 (HDMI/DP playback, BE link 5)
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# PCM7 ----> volume -----> iDisp3 (HDMI/DP playback, BE link 6)
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# PCM8 ----> volume -----> iDisp4 (HDMI/DP playback, BE link 7)
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')
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dnl PIPELINE_PCM_ADD(pipeline,
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dnl pipe id, pcm, max channels, format,
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dnl period, priority, core,
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dnl pcm_min_rate, pcm_max_rate, pipeline_rate,
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dnl time_domain, sched_comp)
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# Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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1, 0, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency capture pipeline 2 on PCM 1 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
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2, 1, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Passthrough capture pipeline 3 on PCM 3 using max 4 channels.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
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3, 3, 4, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Passthrough capture pipeline 4 on PCM 4 using max 4 channels.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-capture-16khz.m4,
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4, 4, 2, s16le,
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1000, 0, 0,
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16000, 16000, 16000)
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ifelse(HDMI, `1',
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`
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# Low Latency playback pipeline 5 on PCM 5 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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5, 5, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 6 on PCM 6 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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6, 6, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 7 on PCM 7 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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7, 7, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 8 on PCM 8 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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8, 8, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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')
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#
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# DAIs configuration
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#
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dnl DAI_ADD(pipeline,
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dnl pipe id, dai type, dai_index, dai_be,
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dnl buffer, periods, format,
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dnl deadline, priority, core, time_domain)
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# playback DAI is ALH(SDW0 PIN2) using 2 periods
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# Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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1, ALH, 2, SDW0-Playback,
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PIPELINE_SOURCE_1, 2, s24le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# capture DAI is ALH(SDW0 PIN2) using 2 periods
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# Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-capture.m4,
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2, ALH, 3, SDW0-Capture,
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PIPELINE_SINK_2, 2, s24le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is ALH(SDW1 PIN2) using 2 periods
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# Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0
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# capture DAI is DMIC01 using 2 periods
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# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-capture.m4,
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3, DMIC, 0, dmic01,
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PIPELINE_SINK_3, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# capture DAI is DMIC16k using 2 periods
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# Buffers use s16le format, with 16 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-capture.m4,
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4, DMIC, 1, dmic16k,
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PIPELINE_SINK_4, 2, s16le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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ifelse(HDMI, `1',
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`
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# playback DAI is iDisp1 using 2 periods
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# Buffers use s32le format, 1000us deadline on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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5, HDA, 0, iDisp1,
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PIPELINE_SOURCE_5, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is iDisp2 using 2 periods
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# Buffers use s32le format, 1000us deadline on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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6, HDA, 1, iDisp2,
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PIPELINE_SOURCE_6, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is iDisp3 using 2 periods
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# Buffers use s32le format, 1000us deadline on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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7, HDA, 2, iDisp3,
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PIPELINE_SOURCE_7, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is iDisp4 using 2 periods
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# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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8, HDA, 3, iDisp4,
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PIPELINE_SOURCE_8, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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')
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# PCM Low Latency, id 0
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dnl PCM_PLAYBACK_ADD(name, pcm_id, playback)
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PCM_PLAYBACK_ADD(SDW-Headphone, 0, PIPELINE_PCM_1)
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PCM_CAPTURE_ADD(SDW-Headset_Mic, 1, PIPELINE_PCM_2)
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PCM_CAPTURE_ADD(DMIC, 2, PIPELINE_PCM_3)
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PCM_CAPTURE_ADD(DMIC16kHz, 3, PIPELINE_PCM_4)
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ifelse(HDMI, `1',
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`
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PCM_PLAYBACK_ADD(HDMI1, 4, PIPELINE_PCM_5)
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PCM_PLAYBACK_ADD(HDMI2, 5, PIPELINE_PCM_6)
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PCM_PLAYBACK_ADD(HDMI3, 6, PIPELINE_PCM_7)
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PCM_PLAYBACK_ADD(HDMI4, 7, PIPELINE_PCM_8)
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')
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#
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# BE configurations - overrides config in ACPI if present
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#
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#ALH dai index = ((link_id << 8) | PDI id)
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#ALH SDW0 Pin2 (ID: 0)
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DAI_CONFIG(ALH, 2, 0, SDW0-Playback,
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ALH_CONFIG(ALH_CONFIG_DATA(ALH, 2, 48000, 2)))
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#ALH SDW0 Pin3 (ID: 1)
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DAI_CONFIG(ALH, 3, 1, SDW0-Capture,
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ALH_CONFIG(ALH_CONFIG_DATA(ALH, 3, 48000, 2)))
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# dmic01 (ID: 2)
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DAI_CONFIG(DMIC, 0, 2, dmic01,
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DMIC_CONFIG(1, 500000, 4800000, 40, 60, 48000,
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DMIC_WORD_LENGTH(s32le), 400, DMIC, 0,
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PDM_CONFIG(DMIC, 0, FOUR_CH_PDM0_PDM1)))
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# dmic16k (ID: 3)
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DAI_CONFIG(DMIC, 1, 3, dmic16k,
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DMIC_CONFIG(1, 500000, 4800000, 40, 60, 16000,
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DMIC_WORD_LENGTH(s16le), 400, DMIC, 1,
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PDM_CONFIG(DMIC, 1, STEREO_PDM0)))
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ifelse(HDMI, `1',
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`
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# 4 HDMI/DP outputs (ID: 4,5,6,7)
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DAI_CONFIG(HDA, 0, 4, iDisp1,
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HDA_CONFIG(HDA_CONFIG_DATA(HDA, 0, 48000, 2)))
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DAI_CONFIG(HDA, 1, 5, iDisp2,
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HDA_CONFIG(HDA_CONFIG_DATA(HDA, 1, 48000, 2)))
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DAI_CONFIG(HDA, 2, 6, iDisp3,
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HDA_CONFIG(HDA_CONFIG_DATA(HDA, 2, 48000, 2)))
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DAI_CONFIG(HDA, 3, 7, iDisp4,
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HDA_CONFIG(HDA_CONFIG_DATA(HDA, 3, 48000, 2)))
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')
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DEBUG_END
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