Current ConfigEditor uses multiple Entry widgets to build a Table
widget since Tkinter does not support Table widget. However, when
the table is big, the loading performance is very slow because of
large mount of Entry widgets. This patch switched to use Treeview
widget to build a table widget, and it is much more faster than the
original implementation.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added mouse wheel scroll event handler so that mouse can
be used to scroll the configuration items on the page.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
The EXT library has some unused code that
we can remove to help reduce the size and
to clean things up some more. Also add a
routine for dumping the group descriptor
table which can be helpful for debugging
issues.
Signed-off-by: James Gutbub <james.gutbub@intel.com>
Current SBL display long help string in single line in ConfigEditor.
If the line is too long, only part of the line is visible on screen.
By change widget from Label to Message, it allows multiple lines
help string display.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
EXT2/3 library has some limiatation to support
hardware block sizes larger than 512 (e.g. 4KB)
and also does not currently support the flag
INCOMPAT_64BIT which indicates larger group
descriptor sizes. This patch adds flexibility
to support 512 and 4KB block sizes as well as
64bit EXT file systems.
Signed-off-by: James Gutbub <james.gutbub@intel.com>
mShellCommandCse is not defined in CoffeelakeBoardPkg so can't extern.
It is not either used in current context.
Signed-off-by: Himanshu Sahdev aka CunningLearner <sahdev.himan@gmail.com>
This patch switched to use SerialPortLib in BootloaderCommonPkg for
QEMU and CFL platforms. For APL platform, it can also use this common
library. However, it has an optimized SerialPortLib with FIFO enabled.
So for APL, it still uses its SOC specific library.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
The common SerialPortLib in BootloaderCommonPkg is not used by anybody.
This patch re-implemented this library to align with the SOC specific
implementation. The intention is to use this common library to replace
SOC specific implementation.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch used the common API GetTimeStampFrequency() to get CPU
TSC frequency instead of the original GetCpuTscFreqency(). As part
of it, all SOC specific instances for GetCpuTscFreqency() were
removed.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added common API interface for GetTimeStampFrequency.
Since all current IA platforms have standard way to get the TSC
frequency, it is better to move it into common lib.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
The latest code has debug message output issue. It is caused by
the following CommitId: 56867c3bc6.
This patch provided proper fixes for this issue. The root cause
is due to incorrect string length.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added call to deinitialize USB in the following places:
- Before OsLoader restarting to run itself
- Before OsLoader transfer control to OS
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
USB sub-system will have host controller scheduling frames on its
own once it is initialized and enabled. Leaving it running while
payload restarting or OS booting could potentially cause memory
corruption since the DMA might still be running on the background
targeting to previously allocated memory. The safer approach is
to stop the USB controller.
It also fixed#351.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
SBL allows debug message to be redirected to output console besides
the serial port. However, serial port itself could be part of the
output console device as well. In this case the debug message will
be printed twice. This patch added check to this condition and skip
the redundant print.
It fixed#349.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current SBL USB keyboard driver cannot handle the key input nicely.
If typing is too fast, some chars will be missing. On the other side,
sometimes singe key press will generate multiple repeated chars.
This patch reimplemented the logic to detect key press/release using
similar flow as EDK2 UsbDxe driver. With this logic, USB keyboard
worked pretty well. It has been tested on APL platform.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current SBL code will assert if HAVE_VERIFIED_BOOT is 0. This patch
added check for PcdVerifiedBootEnabled to decide if IAS verification
is required.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch removes unused regions in SPI descriptor so that the
IFWI layout can be printed correctly even when some region is
disbled.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
The WHL(and CFL-R) has its own SpiFlashLib, but it's almost identical
to common SpiFlashLib except of silicon specific part.
Therefore, CoffeelakePkg will have its own PchSpiLib and re-use common
SpiFlashLib.
- Remove CoffeelakePkg SpiFlashLib and related files
- Use commmon SpiFlashLib
- Use CoffeelakePkg SpiFlashLib
Signed-off-by: Aiden Park <aiden.park@intel.com>
QEMU has its own SpiFlashLib and SpiFlashLib.h file.
But, the header file is identical to the one in Silicon/CommonSocPkg.
Therefore, remove QEMU's one and re-use the common header file from
Silicon/CommonSocPkg.
Signed-off-by: Aiden Park <aiden.park@intel.com>
Use common SpiFlashLib and PchSpiLib of Silicon/CommonSocPkg.
- No more use of SpiFlashLib from BootloaderCommonPkg
Signed-off-by: Aiden Park <aiden.park@intel.com>
Platform Device structure PLT_DEVICE supports both PCI and MMIO formats.
But, SpiConstructor gets SPI device info from Platform Device Table
and it always assumes the info as a PCI format. This patch is to support
both formats.
Signed-off-by: Aiden Park <aiden.park@intel.com>
Remove Silicon specific part from SpiFlashLib and use separate
PchSpiLib for Silicon specific part
- Remove Silicon specific code from SpiFlashLib
- Use PchSpiLib for Silicon specific part
- Remove unnecessary ScSpiCommon.h file
Signed-off-by: Aiden Park <aiden.park@intel.com>
Most of PCH SPI controller are using same mechanism to access SPI BAR
and to control BiosWriteProtect by using SPI PCI device/function.
But, a certain Silicon may use different way to access them.
ex) SPI BAR from LPC A reg, BiosWriteProtect from LPC B reg
Split SpiFlashLib into two parts.
- SpiFlashLib for common part
- PchSpiLib for silicon dependent part
This patch is to prepare the split.
Signed-off-by: Aiden Park <aiden.park@intel.com>
This is prerequisite step to clean-up SpiFlashLib.
- Copy from BootloaderCommonPkg to Silicon/CommonSocPkg.
No code change at all.
- Keep the existing BootloaderCommonPkg SpiFlashLib.
To avoid build failure on existing boards.
The existing boards will use new one at the final clean-up stage.
Signed-off-by: Aiden Park <aiden.park@intel.com>
On WHL after booting to Windows, SCI interrupt storm was seen due
to GPE event 111 (2-tier GPE event). This event needs to be handled
when RTD3 table is implemented. However, current code has _L6F
ASL code without RTD3 table. This causes the SCI event to be enabled
in Windows. Since there is no real handler to clear the SCI event,
SCI interrupt storm will occur. This patch commented out the _L6F ASL
method.
Tested this on WHL. The CPU utilization drop down from original 10%
to close to 0% for system interrupts.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
There is an issue in current SBL Stage2 code to check if the UEFI
payload is built from open source. It was done by checking the
1st DWORD using Dst[0]. However, during the FV loading, the value
at Dst[0] might have been changed since LoadFvImage() can move the
FV to a new location. This patch cached Dst[0] before calling
LoadFvImage() so that it can always get the oringal value.
It fixed#343.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Container type can be input from command line
from a list of [NORMAL, CLASSIC, MULTIBOOT] while
generating a container using GenContainer.py.
Setting default as NORMAL.
Revert varnames of out dir and key dir for commands
other than create container, as this is breaking stitch.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
Add support to load the boot image from container.
Container must be signed using the same private key
as the key used to sign IAS (i.e. IAS_PRIVATE_KEY).
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
Current logic enables all EN bits in PMI_EN in order
to clear single PWRBTN_EN bit. This should not happen.
Corrected the logic so that only PWRBTN_EN is cleared and
the other EN bits are untouched.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
If FPDT->Length is just the size of FIRMWARE_PERFORMANCE_TABLE,
BOOT_PERFORMANCE_TABLE and S3_PERFORMANCE_TABLE are overwritten
by the next Table in ACPI init. Therefore, make the size in the
header as sizeof(INTERNAL_FIRMWARE_PERFORMANCE_TABLE) so that
the next table starts after INTERNAL_FIRMWARE_PERFORMANCE_TABLE.
Otherwise, S3 Perf Table can't be located on S3 resume path.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
On UP Xtreme board current code only supports PCH UART debug port.
But this board has two extra UART ports behind SIO chip F81801.
This patch added required initialization for the SIO chip to enable
UART on SIO. It can be enabled through platform data during stitching.
For exmaple,
"-p 0xAA000210" parameter in stitching will select PCH UART2.
"-p 0xAA00FF10" parameter will select SIO COM1 as debug device.
"-p 0xAA00FE10" parameter will select SIO COM2 as debug device.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
GenContainer.py tool can be used to create a container
with the boot files as follows:
python %SBL_ROOT%\BootloaderCorePkg\Tools\GenContainer.py create
-cl CMDL:<cmdline.txt> KRNL:<vmlinuz> INRD:<initrd>
-o <Out> -k <Key>
<cmdline.txt> = command line file
<vmlinuz> = kernel image
<initrd> = initrd image
<Out> = dir/file where final Pods Image is copied
<Key> = Private signing key file/dir path
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
This patch formats the CFGDATA value string into a standard format
for the generated DLT file. It will format the array string using
its structure type including UINT8/16/32/64.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added support to load CfgData DLT file through
ConfigEditor command line interface. It makes it easy to
run ConfigEditor. It requires DLT file to be in the same
folder as the CfgDataDef.dsc file.
EX: python ConfigEditor.py Brd1.dlt
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current ConfigEditor only supports UINT8 format cell in table.
This patch added support for variable cell width including UINT8,
UINT16, UINT32 in table widget. Test configuration items were
also added in QEMU to test these format.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Slim Bootloader code has both CRLF and LF line-ending files.
Before cleaning-up, disable force_crlf for now.
Change-Id: I2e73ccfb8814ea8638c078f284ca7dbeca298e8b
Signed-off-by: Aiden Park <aiden.park@intel.com>
The PatchCheck.py does basic rule check on commit message and code.
This can be used as one of pre-commit checker before doing PR.
ex) N: the number of commits from HEAD
python BaseTools/Scripts/PatchChecker.py -N
Change-Id: Ib75aafa2c3eb3408de08f7fab7fff4934715547c
Signed-off-by: Aiden Park <aiden.park@intel.com>
- 'OpenFile may be used uninitialized' in ExtLib
- 'undefined reference to memcpy' in FatLib
- 'Lasa/Laml may be used uninitialized' in TpmLib
- 'Adjust may be used uninitialized' in Stage2Support
Signed-off-by: Aiden Park <aiden.park@intel.com>
Compile optimization sometimes needs to be disabled for debugging.
EDKII BaseTools provide NOOPT target, so leverage it.
The default GCC '-O0' and VS '/Od' option results in huge size image,
so the optimization level is adjusted with approximately level.
Add a new build option '-no' or '--noopt' for NOOPT target
- Release build option '-r' will ignore '--noopt' option
ex) python BuildLoader.py build qemu --noopt
Signed-off-by: Aiden Park <aiden.park@intel.com>
Maurice Ma