Commit Graph

984 Commits

Author SHA1 Message Date
Guo Dong d6c1ea6964 Add ACPI Firmware Performance Data Table (FPDT) support
This patch adds FPDT table into ACPI table, and updates all
the performance data for S3 path.
It also update basic boot performance data for reset end.
Other boot performance data could be updated by UEFI payload.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2019-02-25 10:03:46 -07:00
Maurice Ma a11fbf0538 Add multiple VBT table support
Current SBL can only support on VBT file. However, different board
might need different VBT table. It is better to have the capability
to embed multiple VBT table into the image.  This patch implemented
this feature and enabled it on QEMU. By default, it will take the
original behavior. if _MULTI_VBT_FILE in BoardConfig.py is specified,
multiple VBT files can be used.

If multiple VBT table support is required, list them as:
  {VbtImageId1 :VbtFileName1, VbtImageId2 : VbtFileName2, ...}
VbtImageId is ID to identify a VBT image. It is a UINT32 number to
  match the ImageId field in the VBT container.
VbtFileName is the VBT file name. It needs to be located under platform
  VbtBin folder.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2019-02-13 17:15:33 -08:00
Maurice Ma 1c861c84b3 Fix PCIE configuration issue on LeafHill
The PCIe root ports configurations are not correct in the CFGDATA for
LeafHill/OxbowHill/JuniperHill/UP2. This patch fixed the root ports
configurations properly. It also enabled Windows 10 installation
on Leafhill. It fixed #93 .

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2019-02-13 17:15:04 -08:00
Maurice Ma 0473e9e30d [APL] Enable GFX OpRegion in ACPI
This patch enabled APL GFX OpRegion in ACPI table. The OpRegion ASL code
was commented out in current DSDT.  It was causing Windows boot issue
due to invalid ASLB field value in ACPI GNVS. This patch addressed this
issue, and it fixed #88 .

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2019-02-12 08:09:49 -08:00
Maurice Ma f62c2d4553 Enable QEMU firmware update test
This patch fixed some QEMU firmware update related issues.
It enabled firmware update testing on QEMU using script.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2019-02-08 08:45:24 -08:00
Maurice Ma a6efeb29eb Enable payload loading to high memory by default
This patch enabled payload loading into high memory by default. It
is a more flexible way to allocate memory for payload image instead
of hard-coded base address.  However, in some special cases, such
as UEFI payload, it still needs to be executed at pre-compiled address.
This patch also handled this special case in the flow.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2019-01-31 08:04:57 -08:00
Maurice Ma ad42a2bd6e [QEMU] Add QEMU SMM support
This patch added SMM TSEG range support in QEMU FSP.  It also added
QEMU TSEG base and size reporting in HOB.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2019-01-28 20:14:38 -08:00
Guo Dong ee4b3f812f Add SMM support to UEFI payload
Build a new SMM info HOB to payload to report SMM info.
Add UEFI payload variable region into flash map.

TEST=Tested on LeafHill with UEFI payload.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2019-01-22 17:11:54 -07:00
Huang Jin c467303715
[APL] Enlarge payload heap size from 64MB to 128MB (#68)
This change makes more space for SBL paylaod to load
larger IAS image (e.g. Ubuntu kernel + initrd ~ 33MB)

The payload heap memory is reusable as long as crash mode
is disabled.

TEST=Loaded and booted IAS image containing Ubuntu kernel and
     initrd from USB flash drive on UP2 board.

Signed-off-by: Huang Jin <huang.jin@intel.com>
2019-01-15 09:19:19 -08:00
Huang Jin 87aeec3185
[APL] add boot options to boot ACRN Hypervisor (#65)
Boot[1] : the default boot option used by ACRN hypervisor
          iasimage is located on hw part #0, sw part #1 without
          file system.
Boot[4] : boot option to load fastboot code from SPI region.
          SBL enters fastboot mode for eMMC provisioning

TEST=Verified booting to ACRN shell on UP2 board;
     Triggered fastboot mode from shell and verified flashing
     ACRN+SOS to eMMC is successful

Signed-off-by: Huang Jin <huang.jin@intel.com>
2019-01-03 13:24:19 -08:00
Maurice Ma d97fe977df [APL] Support non-redundant flash layout stitching
Current stitching script assumes the flash layout must be redundant
layout. But the layout could be non-redundant layout if the user
wants. This patch added non-redundant flash layout support for the
APL stitching.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2018-12-21 09:46:19 -08:00
Maurice Ma 8c167c83f0 [APL] Adjust flash layout padding for stitching
SBL supports open source stitching mechanism based on an existing
IFWI binary. It can also support FIT stitching mechanism. For FIT
stitching, it is required to add certain padding in the layout so
that each component in IBB and OBB partition can be 4KB aligned.
Current padding component IPAD/OPAD size needs to be updated to
match the number of the component inside IBB and OBB partition.
This patch adjusted the padding size accordingly.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2018-12-12 14:58:57 -08:00
Agrawal 21ddcb16e2 Added Boot Guard debug information.
Debug info contains enable/disable status of Intel Bootguard for
Apollo Lake platform.

Signed-off-by: Agrawal <sachin.agrawal@intel.com>
2018-12-06 13:27:15 -08:00
Maurice Ma 864293a4aa [APL] Make EPAYLOAD size dynamic
On APL platform, default EPAYLOAD size is more than 1MB to enable
UEFI payload. However, if UEFI payload is not used, the space is
still reserved in flash. A more flexible way is to reserve the
EPAYLOAD size only when it is specified in the build command line.
This patch added this capability.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2018-12-06 08:13:10 -08:00
Huang Jin 3f8ccfd9b1 Integrate external fastboot code as a boot option
fastboot protocol allows communication between host and device bootloader
via USB or Ethernet. This patch provides initial configuration in SBL
so that device can enter fastboot mode on device when all previous boot
options are failed.

Typically fastboot is used to provision OS images to eMMC with fastboot
client tool.

The fastboot executable is required to be packaged in IAS format
then integrated into SPI image or copied into the first FAT partition on
a USB key.

This change fixed build configuration to load fastboot code either from
SPI or USB.

Signed-off-by: Huang Jin <huang.jin@intel.com>
2018-12-03 16:11:54 -08:00
Maurice Ma ad4eba4396 [APL] Add BP1 partition size check in StitchLoader.py
Current SitchLoader.py does not verify if the BP1 partition size
is big enough to hold a duplicated BPDT from BP0. And it will
result in invalid BPDT partition format if it occurs. This patch
added a check so that it will error out if insufficient space is
detected.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2018-11-29 08:19:55 -07:00
Guo Dong 501be46716 Update file system support
The patch gives the platform the configuration capability to only build
required file system into final image.
This helps to have a smaller image for fast boot.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2018-11-27 15:09:14 -07:00
Grandhi ce4346fea6 Add code modifications to match the new Device Table concept.
Signed-off-by: Grandhi <sindhura.grandhi@intel.com>
2018-11-27 09:41:32 -08:00
Raghava Gudla 91c09cee79 Updated FwUpdate to get capsule info from cfg data
This patch updates firmware update code to get capsule location
information from configuration data instead of searching in all the
available boot media.

Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
2018-11-21 10:32:44 -07:00
Aiden Park aabfe786a6
Fix gcc compile errors (#43)
There are 'uninitialized' errors and size exceed error in PAYLOAD
with old gcc versions. This change has been verified with gcc-4.8,
gcc-5, gcc-7 and gcc-8 on Ubuntu 18.04 LTS.

Signed-off-by: Aiden Park <aiden.park@intel.com>
2018-11-15 09:39:16 -08:00
Guo Dong cd9edfdd8b Add Device table
Update core code to support device table.
Updated boot option to consume device table.
Update firmware update to consume device table.
Update shell command on boot option changes.
Add device table for APL and Qemu.
Remove unnecessary code.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2018-11-12 09:38:59 -07:00
Aiden Park 0724f9a170 [APL] Rename VTd to Vtd
Rename VTd to Vtd including directories, files and variables to follow
EDKII coding convention.

Change-Id: I0c88dcc1087eafcefb4f6d99dcd25e7b3d031a71
Signed-off-by: Aiden Park <aiden.park@intel.com>
2018-11-09 14:20:07 -08:00
Aiden Park 3f8afb82f8 [APL] Remove hard-code uart2 BAR when VT-d is enabled
This hard-coded uart2 bar was a W/A for a specific board and may cause
a confusion in uart2 mmio space for other boards when VT-d is enabled.

Change-Id: I945a6dffbc1bd5afcb16699bf800826c3744a315
Signed-off-by: Aiden Park <aiden.park@intel.com>
2018-11-09 14:20:07 -08:00
Aiden Park e690373d7b [APL] Fix a compile error when VTD is disabled on APL
When VTD_ENABLE sets to '0', a compile error occurs because some .inf
files refer to VtdLib. Therefore, VtdLib is included to default
libraries - dsc_libs['IA32'].

Additionaly, VTD_ENABLED is renamed to ENABLE_VTD to make feature
enabling name consistent

Change-Id: I74c12bdc2805ebd0a5774780f029a460b33d19d5
Signed-off-by: Aiden Park <aiden.park@intel.com>
2018-11-09 14:20:07 -08:00
Maurice Ma f768137b66 Add basic SMM rebasing support
SBL has no intention to support SMI. However, on many hardware
platforms, there is no reliable way to prevent SMI from generating
through SMI IPI.  In case it occurs, CPU will jump to the default
0x38000 location for execution, which exposes huge security issues.

The recommended solution is to do basic SMM base relocation and put
a dummy SMI handler (RSM) there for platform does not support SMI
disabling. In this way, the SMI will be ignored, and it also closes
the security concerns. This patch implemented basic SMM relocation.

It is under the control of a new PCD PcdSmmRebaseEnabled. By default,
it is disabled.  To enable it, please set ENABLE_SMM_REBASE in
BoardConfig.py. As part of it, platform library needs to set
PcdSmramTsegBase and PcdSmramTsegSize properly in PreSiliconInit board
hook. Please take APL platform for reference.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2018-11-01 20:00:13 -07:00
Maurice Ma 697c02302f Enable USB keyboard console support for QEMU
Previous USB keyboard console support commit worked fine on APL real
platform, but it has issue on QEMU. This patch further enables USB
keyboard console support for QEMU. A new PcdUsbKeyboardPollingTimeout
is added. It will be used to control the USB keyboard interrupt
transfer polling timeout. For QEMU, it needs a larger number due to
timing issue. As part of it, booting from USB device is also enabled
by this patch. This patch fixes #30.

To test USB keyboard console in QEMU, please first change
CONSOLE_IN _DEVICE_MASK in BoardConfig.py to 3, and then add the
following in the QEMU command line to add XHCI controller and USB KB:
-device qemu-xhci,id=xhci,bus=pcie.0,addr=4 -device usb-kbd,bus=xhci.0

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2018-10-29 09:39:27 -07:00
Maurice Ma 1502566fe0 Report APL SoC reserved MMIO resources through ACPI
On APL platform, the chipset SoC reserved MMIO resources are not
reported properly to OS through ACPI. It should report it using
_CRS method. This patch fixes #28.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2018-10-29 08:28:36 -07:00
Maurice Ma 03385ca8a7 Enable graphics framebuffer as WriteCombining
On APL platform, all PCI MMIO range is set to UC in current
implementation. It includes graphics framebuffer MMIO. It
caused the system performance issue due to large mount of
framebuffer write access. This patch set framebuffer as
WC (WriteCombining) per recommendation to enhance system
performance.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2018-10-26 11:03:09 -07:00
Borgerson, Matthew A 2255bc10b0 Enable basic framebuffer text console output
This patch simplifies the GraphicsLib code and adds an abstraction layer
for printing to a virtual "console," through the familier
ConsoleWrite(buffer, len) style function call.

ConsoleWrite can be configured to output to either the serial port, or
the display framebuffer, or both. This primarily enables the command
shell to be used with a display and keyboard.

Signed-off-by: Borgerson, Matthew A <matthew.a.borgerson@intel.com>
2018-10-25 19:25:44 -07:00
Guo Dong 965155634a [APL] Fix size bug when copy BootOption
When copying boot option from configuration data to
internal boot option structure, the code should just
copy exact size required for boot options.

Change-Id: Iede4ede3ad717b6a0245800569a19fe686afb233
Signed-off-by: Guo Dong <guo.dong@intel.com>
2018-10-25 18:00:36 -07:00
Aiden Park b6697f12a8
Enable DebugAgentLib to support source level debug over serial (#18)
* Enable DebugAgentLib to support source level debug over serial

By default, source level debug is NOT enabled. ENABLE_SOURCE_DEBUG
needs to be set to 1 in BoardConfig.py of each Platforms.
- self.ENABLE_SOURCE_DEBUG  = 1

As an initial drop, there are some limitations on APL platform.
- Stage1A does not include DebugAgentLib due to Stage1A size
  limitation(32KB). Further optimization is required.
- DebugAgentLib supports ONLY POSTMEM debugging on APL currently.

Refer to EDKII Debugging:
- https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Debugging
- https://github.com/tianocore/tianocore.github.io/wiki/SourceLevelDebugPkg

Change-Id: Ia28c5470bc5755768f2b380cc1dabbcb8ee60f0d
Signed-off-by: Aiden Park <aiden.park@intel.com>

* Additional changes for DebugAgent

- Adjust stage size depending on ENABLE_SOURCE_DEBUG Pcd value
- Add PeCoffFindAndReportImageInfo
- Fix debugger hang at Shell

Change-Id: I11b41e5ad610fcb2999e9d43e5dd8f8899e8265a
Signed-off-by: Aiden Park <aiden.park@intel.com>

* Move PeCoffFindAndReportImageInfo() from LitePeCoffLib to DebugAgentLib

Change-Id: I2c4ab4f9561dfd0536da1820048f0e5f2660e2ab
Signed-off-by: Aiden Park <aiden.park@intel.com>
2018-10-15 10:45:23 -07:00
Maurice Ma 09f8270825 Add USB input console support
This patch implemented USB keyboard library and added it as an
input console device. It can be enabled by setting BIT1 in
self.CONSOLE_IN_DEVICE_MASK in BoardConfig.py. By default, it
will be disabled for performance and size consideration.

Test has been done on APL Leafhill board. USB keyboard can work
in Shell.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2018-10-09 12:56:58 -07:00
Guo, Dong fb8d75f08e Retire windows build script
Update build tool to use Buildloader.py to build SBL
in both Linux and Windows.
Update tools to support multiple workspaces, so platform
packages could be in another place.

TEST=Build qemu and APL platform success.

Change-Id: I2482037ba605218c947b6de28abe8e3eeacdc17f
Signed-off-by: Guo, Dong <guo.dong@intel.com>
2018-09-28 08:18:23 -07:00
Maurice Ma c6999f497a Initial check-in for Slim Bootloader source 2018-09-13 16:11:07 -07:00