acrn-hypervisor/hypervisor/include/dm
Li Fei1 65ed6c3529 hv: vpci: trap PCIe ECAM access for SOS
SOS will use PCIe ECAM access PCIe external configuration space. HV should trap this
access for security(Now pre-launched VM doesn't want to support PCI ECAM; post-launched
VM trap PCIe ECAM access in DM).
Besides, update PCIe MMCONFIG region to be owned by hypervisor and expose and pass through
platform hide PCI devices by BIOS to SOS.

Tracked-On: #3475
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-01-07 16:05:30 +08:00
..
io_req.h hv: io: add unregister_mmio_emulation_handler API 2019-10-29 14:49:55 +08:00
vacpi.h HV: rename CONFIG_MAX_PCPU_NUM to MAX_PCPU_NUM 2019-12-12 13:49:28 +08:00
vioapic.h HV: Clean vpic and vioapic logic when lapic is pt 2019-06-12 14:29:50 +08:00
vpci.h hv: vpci: trap PCIe ECAM access for SOS 2020-01-07 16:05:30 +08:00
vpic.h HV:Modularize vpic code to remove usage of acrn_vm 2019-06-13 09:54:52 +08:00
vuart.h hv: rename vuart operations 2019-11-08 09:01:01 +08:00