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HV:Modularize vpic code to remove usage of acrn_vm 

V1:Initial Patch
Modularize vpic. The current patch reduces the usage
of acrn_vm inside the vpic.c file.
Due to the global natire of register_pio_handler, where
acrn_vm is being passed, some usage remains.
These needs to be a separate "interface" file.
That will come in smaller newer patch provided
this patch is accepted.

V2:
Incorporated comments from Jason.

V3:
Fixed some MISRA-C Violations.

Tracked-On: #1842
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
Reviewed-by: Xu, Anthony <anthony.xu@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
This commit is contained in:
Arindam Roy 2019-05-16 13:58:02 -07:00 committed by Eddie Dong
parent c91a54882f
commit 2321fcdf78
6 changed files with 36 additions and 53 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
hypervisor/arch/x86/guest/assign.c
View File

@ -253,7 +253,7 @@ ptirq_build_physical_rte(struct acrn_vm *vm, struct ptirq_remapping_info *entry)
ioapic_get_rte(phys_irq, &phys_rte);
rte = phys_rte;
rte.bits.trigger_mode = IOAPIC_RTE_TRGRMODE_EDGE;
vpic_get_irqline_trigger_mode(vm, (uint32_t)virt_sid->intx_id.pin, &trigger);
vpic_get_irqline_trigger_mode(vm_pic(vm), (uint32_t)virt_sid->intx_id.pin, &trigger);
if (trigger == LEVEL_TRIGGER) {
rte.bits.trigger_mode = IOAPIC_RTE_TRGRMODE_LEVEL;
}
@ -499,11 +499,11 @@ static void ptirq_handle_intx(struct acrn_vm *vm,
enum vpic_trigger trigger;
/* VPIN_PIC src means we have vpic enabled */
vpic_get_irqline_trigger_mode(vm, virt_sid->intx_id.pin, &trigger);
vpic_get_irqline_trigger_mode(vm_pic(vm), virt_sid->intx_id.pin, &trigger);
if (trigger == LEVEL_TRIGGER) {
vpic_set_irqline(vm, virt_sid->intx_id.pin, GSI_SET_HIGH);
vpic_set_irqline(vm_pic(vm), virt_sid->intx_id.pin, GSI_SET_HIGH);
} else {
vpic_set_irqline(vm, virt_sid->intx_id.pin, GSI_RAISING_PULSE);
vpic_set_irqline(vm_pic(vm), virt_sid->intx_id.pin, GSI_RAISING_PULSE);
}
break;
}
@ -579,7 +579,7 @@ void ptirq_intx_ack(struct acrn_vm *vm, uint32_t virt_pin, uint32_t vpin_src)
}
break;
case PTDEV_VPIN_PIC:
vpic_set_irqline(vm, virt_pin, GSI_SET_LOW);
vpic_set_irqline(vm_pic(vm), virt_pin, GSI_SET_LOW);
break;
default:
/*

4
hypervisor/arch/x86/guest/virq.c
View File

@ -139,14 +139,14 @@ static bool vcpu_do_pending_extint(const struct acrn_vcpu *vcpu)
primary = vcpu_from_vid(vm, BOOT_CPU_ID);
if (vcpu == primary) {
vpic_pending_intr(vcpu->vm, &vector);
vpic_pending_intr(vm_pic(vcpu->vm), &vector);
if (vector <= NR_MAX_VECTOR) {
dev_dbg(ACRN_DBG_INTR, "VPIC: to inject PIC vector %d\n",
vector & 0xFFU);
exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD,
VMX_INT_INFO_VALID |
(vector & 0xFFU));
vpic_intr_accepted(vcpu->vm, vector);
vpic_intr_accepted(vm_pic(vcpu->vm), vector);
ret = true;
}
}

2
hypervisor/common/hypercall.c
View File

@ -397,7 +397,7 @@ int32_t hcall_set_irqline(const struct acrn_vm *vm, uint16_t vmid,
* number #2 to PIC IRQ #0.
*/
irq_pic = (ops->gsi == 2U) ? 0U : ops->gsi;
vpic_set_irqline(target_vm, irq_pic, ops->op);
vpic_set_irqline(vm_pic(target_vm), irq_pic, ops->op);
}
/* handle IOAPIC irqline */

56
hypervisor/dm/vpic.c
View File

@ -36,7 +36,7 @@
static void vpic_set_pinstate(struct acrn_vpic *vpic, uint32_t pin, uint8_t level);
static inline struct acrn_vpic *vm_pic(const struct acrn_vm *vm)
struct acrn_vpic *vm_pic(const struct acrn_vm *vm)
{
return (struct acrn_vpic *)&(vm->arch_vm.vpic);
}
@ -453,21 +453,19 @@ static void vpic_set_pinstate(struct acrn_vpic *vpic, uint32_t pin, uint8_t leve
/**
* @brief Set vPIC IRQ line status.
*
* @param[in] vm Pointer to target VM
* @param[in] vpic Pointer to virtual pic structure
* @param[in] irqline Target IRQ number
* @param[in] operation action options:GSI_SET_HIGH/GSI_SET_LOW/
* GSI_RAISING_PULSE/GSI_FALLING_PULSE
*
* @return None
*/
void vpic_set_irqline(const struct acrn_vm *vm, uint32_t irqline, uint32_t operation)
void vpic_set_irqline(struct acrn_vpic *vpic, uint32_t irqline, uint32_t operation)
{
struct acrn_vpic *vpic;
struct i8259_reg_state *i8259;
uint32_t pin;
if (irqline < NR_VPIC_PINS_TOTAL) {
vpic = vm_pic(vm);
i8259 = &vpic->i8259[irqline >> 3U];
pin = irqline;
@ -511,13 +509,9 @@ vpic_pincount(void)
* @pre irqline < NR_VPIC_PINS_TOTAL
* @pre this function should be called after vpic_init()
*/
void vpic_get_irqline_trigger_mode(const struct acrn_vm *vm, uint32_t irqline,
void vpic_get_irqline_trigger_mode(const struct acrn_vpic *vpic, uint32_t irqline,
enum vpic_trigger *trigger)
{
struct acrn_vpic *vpic;
vpic = vm_pic(vm);
if ((vpic->i8259[irqline >> 3U].elc & (1U << (irqline & 0x7U))) != 0U) {
*trigger = LEVEL_TRIGGER;
} else {
@ -528,21 +522,18 @@ void vpic_get_irqline_trigger_mode(const struct acrn_vm *vm, uint32_t irqline,
/**
* @brief Get pending virtual interrupts for vPIC.
*
* @param[in] vm Pointer to target VM
* @param[in] vpic Pointer to target VM's vpic table
* @param[inout] vecptr Pointer to vector buffer and will be filled
* with eligible vector if any.
*
* @pre this function should be called after vpic_init()
* @return None
*/
void vpic_pending_intr(struct acrn_vm *vm, uint32_t *vecptr)
void vpic_pending_intr(struct acrn_vpic *vpic, uint32_t *vecptr)
{
struct acrn_vpic *vpic;
struct i8259_reg_state *i8259;
uint32_t pin;
vpic = vm_pic(vm);
i8259 = &vpic->i8259[0];
spinlock_obtain(&(vpic->lock));
@ -597,13 +588,10 @@ static void vpic_pin_accepted(struct i8259_reg_state *i8259, uint32_t pin)
* @pre vm != NULL
* @pre this function should be called after vpic_init()
*/
void vpic_intr_accepted(struct acrn_vm *vm, uint32_t vector)
void vpic_intr_accepted(struct acrn_vpic *vpic, uint32_t vector)
{
struct acrn_vpic *vpic;
uint32_t pin;
vpic = vm_pic(vm);
spinlock_obtain(&(vpic->lock));
pin = (vector & 0x7U);
@ -709,14 +697,12 @@ static int32_t vpic_write(struct acrn_vpic *vpic, struct i8259_reg_state *i8259,
return error;
}
static int32_t vpic_master_handler(struct acrn_vm *vm, bool in, uint16_t port,
static int32_t vpic_master_handler(struct acrn_vpic *vpic, bool in, uint16_t port,
size_t bytes, uint32_t *eax)
{
struct acrn_vpic *vpic;
struct i8259_reg_state *i8259;
int32_t ret;
vpic = vm_pic(vm);
i8259 = &vpic->i8259[0];
if (bytes != 1U) {
@ -734,7 +720,7 @@ static bool vpic_master_io_read(struct acrn_vm *vm, struct acrn_vcpu *vcpu, uint
{
struct pio_request *pio_req = &vcpu->req.reqs.pio;
if (vpic_master_handler(vm, true, addr, width, &pio_req->value) < 0) {
if (vpic_master_handler(vm_pic(vm), true, addr, width, &pio_req->value) < 0) {
pr_err("pic master read port 0x%x width=%d failed\n",
addr, width);
}
@ -747,7 +733,7 @@ static bool vpic_master_io_write(struct acrn_vm *vm, uint16_t addr, size_t width
{
uint32_t val = v;
if (vpic_master_handler(vm, false, addr, width, &val) < 0) {
if (vpic_master_handler(vm_pic(vm), false, addr, width, &val) < 0) {
pr_err("%s: write port 0x%x width=%d value 0x%x failed\n",
__func__, addr, width, val);
}
@ -755,14 +741,12 @@ static bool vpic_master_io_write(struct acrn_vm *vm, uint16_t addr, size_t width
return true;
}
static int32_t vpic_slave_handler(struct acrn_vm *vm, bool in, uint16_t port,
static int32_t vpic_slave_handler(struct acrn_vpic *vpic, bool in, uint16_t port,
size_t bytes, uint32_t *eax)
{
struct acrn_vpic *vpic;
struct i8259_reg_state *i8259;
int32_t ret;
vpic = vm_pic(vm);
i8259 = &vpic->i8259[1];
if (bytes != 1U) {
@ -780,7 +764,7 @@ static bool vpic_slave_io_read(struct acrn_vm *vm, struct acrn_vcpu *vcpu, uint1
{
struct pio_request *pio_req = &vcpu->req.reqs.pio;
if (vpic_slave_handler(vm, true, addr, width, &pio_req->value) < 0) {
if (vpic_slave_handler(vm_pic(vm), true, addr, width, &pio_req->value) < 0) {
pr_err("pic slave read port 0x%x width=%d failed\n",
addr, width);
}
@ -792,7 +776,7 @@ static bool vpic_slave_io_write(struct acrn_vm *vm, uint16_t addr, size_t width,
{
uint32_t val = v;
if (vpic_slave_handler(vm, false, addr, width, &val) < 0) {
if (vpic_slave_handler(vm_pic(vm), false, addr, width, &val) < 0) {
pr_err("%s: write port 0x%x width=%d value 0x%x failed\n",
__func__, addr, width, val);
}
@ -800,14 +784,12 @@ static bool vpic_slave_io_write(struct acrn_vm *vm, uint16_t addr, size_t width,
return true;
}
static int32_t vpic_elc_handler(struct acrn_vm *vm, bool in, uint16_t port, size_t bytes,
static int32_t vpic_elc_handler(struct acrn_vpic *vpic, bool in, uint16_t port, size_t bytes,
uint32_t *eax)
{
struct acrn_vpic *vpic;
bool is_master;
int32_t ret;
vpic = vm_pic(vm);
is_master = (port == IO_ELCR1);
if (bytes == 1U) {
@ -850,7 +832,7 @@ static bool vpic_elc_io_read(struct acrn_vm *vm, struct acrn_vcpu *vcpu, uint16_
{
struct pio_request *pio_req = &vcpu->req.reqs.pio;
if (vpic_elc_handler(vm, true, addr, width, &pio_req->value) < 0) {
if (vpic_elc_handler(vm_pic(vm), true, addr, width, &pio_req->value) < 0) {
pr_err("pic elc read port 0x%x width=%d failed", addr, width);
}
@ -862,7 +844,7 @@ static bool vpic_elc_io_write(struct acrn_vm *vm, uint16_t addr, size_t width,
{
uint32_t val = v;
if (vpic_elc_handler(vm, false, addr, width, &val) < 0) {
if (vpic_elc_handler(vm_pic(vm), false, addr, width, &val) < 0) {
pr_err("%s: write port 0x%x width=%d value 0x%x failed\n",
__func__, addr, width, val);
}
@ -900,9 +882,9 @@ void vpic_init(struct acrn_vm *vm)
{
struct acrn_vpic *vpic = vm_pic(vm);
vpic_register_io_handler(vm);
vm->arch_vm.vpic.vm = vm;
vm->arch_vm.vpic.i8259[0].mask = 0xffU;
vm->arch_vm.vpic.i8259[1].mask = 0xffU;
vpic->vm = vm;
vpic->i8259[0].mask = 0xffU;
vpic->i8259[1].mask = 0xffU;
spinlock_init(&(vpic->lock));
}

2
hypervisor/dm/vuart.c
View File

@ -171,7 +171,7 @@ void vuart_toggle_intr(const struct acrn_vuart *vu)
operation = (intr_reason != IIR_NOPEND) ? GSI_SET_HIGH : GSI_SET_LOW;
}
vpic_set_irqline(vu->vm, vu->irq, operation);
vpic_set_irqline(vm_pic(vu->vm), vu->irq, operation);
vioapic_set_irqline_lock(vu->vm, vu->irq, operation);
}

15
hypervisor/include/dm/vpic.h
View File

@ -149,39 +149,40 @@ void vpic_init(struct acrn_vm *vm);
/**
* @brief Set vPIC IRQ line status.
*
* @param[in] vm Pointer to target VM
* @param[in] vpic Pointer to target VM's vpic table
* @param[in] irqline Target IRQ number
* @param[in] operation action options:GSI_SET_HIGH/GSI_SET_LOW/
* GSI_RAISING_PULSE/GSI_FALLING_PULSE
*
* @return None
*/
void vpic_set_irqline(const struct acrn_vm *vm, uint32_t irqline, uint32_t operation);
void vpic_set_irqline(struct acrn_vpic *vpic, uint32_t irqline, uint32_t operation);
/**
* @brief Get pending virtual interrupts for vPIC.
*
* @param[in] vm Pointer to target VM
* @param[in] vpic Pointer to target VM's vpic table
* @param[inout] vecptr Pointer to vector buffer and will be filled
* with eligible vector if any.
*
* @return None
*/
void vpic_pending_intr(struct acrn_vm *vm, uint32_t *vecptr);
void vpic_pending_intr(struct acrn_vpic *vpic, uint32_t *vecptr);
/**
* @brief Accept virtual interrupt for vPIC.
*
* @param[in] vm Pointer to target VM
* @param[in] vpic Pointer to target VM's vpic table
* @param[in] vector Target virtual interrupt vector
*
* @return None
*
* @pre vm != NULL
*/
void vpic_intr_accepted(struct acrn_vm *vm, uint32_t vector);
void vpic_get_irqline_trigger_mode(const struct acrn_vm *vm, uint32_t irqline, enum vpic_trigger *trigger);
void vpic_intr_accepted(struct acrn_vpic *vpic, uint32_t vector);
void vpic_get_irqline_trigger_mode(const struct acrn_vpic *vpic, uint32_t irqline, enum vpic_trigger *trigger);
uint32_t vpic_pincount(void);
struct acrn_vpic *vm_pic(const struct acrn_vm *vm);
/**
* @}