Commit Graph

62 Commits

Author SHA1 Message Date
Yang, Yu-chu cb064b1133 HV: Do not return expression contains subexpression
Operation should be done outside return expression.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2018-07-10 15:55:33 +08:00
Junjie Mao 0f777d3fe1 HV: assert: use signed int for __LINE__
GCC preprocessor expands __LINE__ to signed decimal integers. Keep the prototype
of __assert aligned with this.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 13:10:10 +08:00
Yang, Yu-chu e263d8ebb9 HV: No assignment inside while loop condition
The assigment should be done outside while loop condition. To fix
it, one assigment initializaion and update statement of for loop
have been applied. The only while loop reminds to avoid very long
for loop expression.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2018-07-10 12:59:12 +08:00
Huihuang Shi 0ccd74b947 HV:modified vm_description and vm_hw_info memebers' type
transfer num_vcpus,exp_num_vcpus to uint16_t.
transfer vm_hw_num_cores to uint16_t.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 12:42:22 +08:00
Yang, Yu-chu 39159ebe16 HV: Assignment should not mix with operator
Removed the postfix and prefix operation in assignment expression.
Noncompliant code example:
1) *a++ = *b ++;
2) a = arr[--b];

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2018-07-10 11:56:36 +08:00
Yang, Yu-chu dd695f3cfa HV: Moving operators out from conditions
To follow the Misra-c standard, any operators should be done outside
the conditions. Removed the prefix, postfix and bitwise shift from
conditions.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2018-07-09 13:10:34 +08:00
Shiqing Gao 54bd55d636 hv: fix 'Recursion in procedure calls found'
Here is how the recursion might happen:

                     when there is something wrong
                     |
sbuf_put -> memcpy_s -> pr_err -> do_logmsg
   |                                 |
   -----------------------------------

Replace 'pr_err' with 'ASSERT' in 'memcpy_s' to break this kind of
recursion.

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-07-09 09:24:15 +08:00
Mingqiang Chi deb44402e3 hv:fix "missing for discarded return value" for memcpy_s and strcpy_s
It will print error information inside memcpy_s if
the parameteter is invalid, the caller can not check
the return value for memcpy_s/strcpy_s/strncpy_s
code like this:
int a(void) {
return 0;
}
int b(void){
a();
}
fix as follow:
int a(void) {
return 0;
}
int b(void){
(void)a();
}

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-07-09 09:22:37 +08:00
Yang, Yu-chu 8779e4fd20 HV: uart16550: check the denominator before use
To prevent the value is devided by zero, checks the denominator
before the calculation. Adding the if statement to check before use.
If the baud_rate is equal to zero, using default baud_rate.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2018-07-06 11:33:36 +08:00
Mingqiang Chi 666430a3d4 hv:fix "missing for discarded return value" for memset
No need to check the return value for memset
code like this:
int a(void) {
	return 0;
}
int b(void){
	a();
}
fix as follow:
int a(void) {
	return 0;
}
int b(void){
	(void)a();
}

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-05 14:14:48 +08:00
Huihuang Shi 96372ed09c HV:misc:add suffix U to the numeric constant
Add suffix U to the numeric constant

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-05 11:29:46 +08:00
Xiangyang Wu b74358d08e HV:treewide:string assigned to const object
In the hypervisor, some strings are assigned to non const
object, this violates MISRA C:2012.

Update the type of the object as const type since it always
points to string.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
2018-07-05 11:13:51 +08:00
Yonghua Huang cc7167026b HV: cleanup coding style violation
- replace MACROs with inline functions
 - remove unused local viarbles
 - fix build errors

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-07-05 10:00:14 +08:00
Xiangyang Wu b76c92bf3e HV:treewide:Update cpu_id type as uint_16
There are extra type conversion in the HV since cpu_id
type is uint32_t and the return value type of get_cpu_id
is uint16_t. BTW, the name of cpu_id is not clear enough
to express its usage.

So the following updates are made in this patch:
Update cpu_id type as unit_16 to reduce type casting;
Update related temporary variables type;
Update related print argument;
Change the input parameter name of interrupt_init as
cpu_id to keep align with function implement;
Rename cpu_id as pcpu_id as needed.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 16:39:26 +08:00
Xiangyang Wu 188210ab03 HV:Treewide:Update the type of vcpu id as uint16_t
In the hypervisor, virtual cpu id is defined as "int" or "uint32_t"
type in the hypervisor. So there are some sign conversion issues
about virtual cpu id (vcpu_id) reported by static analysis tool.
Sign conversion violates the rules of MISRA C:2012.

BTW, virtual cpu id has different names (vcpu_id, cpu_id, logical_id)
 for different modules of HV, its type is defined as "int" or "uint32_t"
in the HV. cpu_id type and logical_id type clean up will be done in
other patchs.

V1-->V2:
         More clean up the type of vcpu id;
         "%hu" is for vcpu id in the print function.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
2018-07-04 14:28:52 +08:00
Huihuang Shi 91fdffb19a HV:debug:fix "signed/unsigned conversion without cast"
Misra C required signed/unsigned conversion with cast.

V1->V2:
  a.split patch to patch series

V2->V3:
  a.Change the API tgt_uart/ static int uart16550_get_rx_err(uint32_t rx_data) to return uint32_t
  b.modified the format of if from "if (length > 32*(length/32))" to
"if (length % 32U > 0)"

V3->V4:
  a.change the uint64_t type numeric constant's suffix from U to UL

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 12:18:38 +08:00
Junjie Mao e75cca64c8 HV: timer: keep TSC frequency in KHz
This patch represents TSC freqeuency in KHz using a 32-bit unsigned integer.

The conversion macros between ticks and us/ms are changed to inline functions to
enforce the types of the input parameters. Note that us_to_ticks accepts only
uint32_t (~4K us at most) and never overflows.

Results of some unit tests on the conversion functions:

    calibrate_tsc, tsc_khz=1881600
    64us -> ticks: 120422
    64us -> ticks -> us: 63
    511us -> ticks: 961497
    511us -> ticks -> us: 510
    1280000 ticks -> us: 680
    1280000 ticks -> us -> ticks: 1279488

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-03 10:18:06 +08:00
Kaige Fu 7a66c317b5 HV: Remove vm->attr.name
We define attr.name in struct vm and named as ("vm_%d", attr.id). attr.name only
be used in debug tool vm_list. It does't deserve to do so in OS created flow
(aka function create_vm). It's better to handle this in vm_list tool.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@inte.com>
2018-07-02 10:48:36 +08:00
Huihuang Shi 4de869665e HV:treewide:transfer the struct member types to non-basic types
The struct member types should be transfer to non-basic types,
chaned it to length-prefix(uint32_t,int32_t ...) type.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 15:48:19 +08:00
Yonghua Huang bbdb204750 HV:- Refine strtol() & strtoul()
- replace 'strtol()' with 'strtol_deci()'
    -- supports string with decimal format

 - replace 'strtoul()' with 'strtoul_hex()'
    -- support string with hex format

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 15:47:07 +08:00
Huihuang Shi 9600dfa07d fix "function return type inconsistent"
MISRA C required function return type should be consistented.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Xiangyang Wu c585172492 Rename phy_cpu_num as phys_cpu_num
phys_cpu_num is more popular than phy_cpu_num, update them
through command.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-22 16:12:52 +08:00
Xiangyang Wu 3027bfab10 HV: treewide: enforce unsignedness of pcpu_id
In the hypervisor, physical cpu id is defined as "int" or "uint32_t"
type in the hypervisor. So there are some sign conversion issues
about  physical cpu id (pcpu_id) reported by static analysis tool.
Sign conversion violates the rules of MISRA C:2012.

In this patch, define physical cpu id as "uint16_t" type for all
modules in the hypervisor and change related codes. The valid
range of pcpu_id is 0~65534, INVALID_PCPU_ID is defined to the
invalid pcpu_id for error detection, BROADCAST_PCPU_ID is
broadcast pcpu_id used to notify all valid pcpu.

The type of pcpu_id in the struct vcpu and vcpu_id is "int" type,
this will be fixed in another patch.

V1-->V2:
    *  Change the type of pcpu_id from uint32_t to uint16_t;
    *  Define INVALID_PCPU_ID for error detection;
    *  Define BROADCAST_PCPU_ID to notify all valid pcpu.

V2-->V3:
    *  Update comments for INVALID_PCPU_ID and BROADCAST_PCPU_ID;
    *  Update addtional pcpu_id;
    *  Convert hexadecimals to unsigned to meet the type of pcpu_id;
    *  Clean up for MIN_PCPU_ID and MAX_PCPU_ID, they will be
       defined by configuration.
Note: fix bug in the init_lapic(), the pcpu_id shall be less than 8,
this is constraint by implement in the init_lapic().
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-21 16:59:21 +08:00
Junjie Mao aa505a28bb HV: treewide: convert hexadecimals used in bitops to unsigned
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-06-21 13:12:39 +08:00
Huihuang Shi 23921384d0 HV:debug:fix "expression is not Boolean"
MISRA C explicit required expression should be boolean when
in branch statements (if,while...).

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-20 14:19:47 +08:00
Yan, Like 20b50ad4e8 HV: correct loglevel definitions and default values
1. remove duplicated definitions of mem_loglevel/console_loglevel;
2. Set default loglevels to display important messages:
 - CONSOLE_LOGLEVEL_DEFALUT is changed from 2 to 3;
 - MEM_LOGLEVEL_DEFAULT is changed from 4 to 5.

Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Yan, Like <like.yan@intel.com>
2018-06-20 13:23:46 +08:00
zhouji3x ad2d855302 hv: save registers on exception
This patch is for crashmode/ramdump. when exception occur:
1) save registers;
2) flush cache

Signed-off-by: zhouji3x <jianfengx.zhou@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-19 17:30:24 +08:00
Huihuang Shi 977c4b20b5 fix parted of "missing for discarded return value"
MISRA C required that return value should be used, missing for it should
add "(void)" prefix before the function call.
Some function can be declared without return value to avoid this problem.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-19 16:21:45 +08:00
zhouji3x 5f5c16dc15 hv: add shell command to trigger crash
this patch add shell command trigger crash for testing crashmode/ramdump

Signed-off-by: zhouji3x <jianfengx.zhou@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-19 15:32:04 +08:00
Yin Fengwei feed38f5ae hv: add suspend/resume callback for console
To handle s3 enter/exit for console

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-14 13:41:45 +08:00
Jason Chen CJ 7aa3391d81 shell: refine shell function with copy_from_gva
using copy_from_gva for shell function shell_vcpu_dumpreg &
shell_vcpu_dumpmem

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-11 12:14:43 +08:00
Jason Chen CJ 4176042982 dump: refine dump.c with copy_from_gva
using copy_from_gva to do dump_guest_stack & show_guest_call_trace

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-11 12:14:43 +08:00
Junjie Mao c849bff850 HV: config: adapt to the generated config.h
This patch drops "#include <bsp_cfg.h>" and include the generated config.h in
CFLAGS for the configuration data.

Also make sure that all configuration data have the 'CONFIG_' prefix.

v4 -> v5:

    * No changes.

v3 -> v4:

    * Add '-include config.h' to hypervisor/bsp/uefi/efi/Makefile.
    * Update comments mentioning bsp_cfg.h.

v2 -> v3:

    * Include config.h on the command line instead of in any header or source to
      avoid including config.h multiple times.
    * Add config.h as an additional dependency for source compilation.

v1 -> v2:

    * No changes.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
2018-06-08 17:21:13 +08:00
Huihuang Shi e591315a65 HV:treewide:C99-friendly per_cpu implementation change the per_cpu method
The current implementation of per_cpu relies on several non-c99 features,
and in additional involves arbitrary pointer arithmetic which is not MIS-
RA C friendly.

This patch introduces struct per_cpu_region which holds all the per_cpu
variables. Allocation of per_cpu data regions and access to per_cpu vari-
ables are greatly simplified, at the cost of making all per_cpu varaibl-
es accessible in files.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
2018-06-05 17:09:00 +08:00
Binbin Wu 9e7179c950 hv: support gva2gpa in different paging modes
Translate gva2gpa in different paging modes.
Change the definition of gva2gpa.
- return value for error status
- Add a parameter for error code when paging fault.
Change the definition of vm_gva2gpa.
- return value for error status
- Add a parameter for error code when paing fault.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-06-01 19:14:13 +08:00
Minggui Cao cd5d8c8da7 check UART valid or not when setup console timer
if no valid UART in hypervisor, not need setup console timer.

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
2018-06-01 14:22:27 +08:00
David B. Kinder f4122d99c5 license: Replace license text with SPDX tag
Replace the BSD-3-Clause boiler plate license text with an SPDX tag.

Fixes: #189

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-06-01 10:43:06 +08:00
Kaige Fu 9af38e16e5 HV: Add log info when setup hvlog share buf
We have two sbuf for hvlog: one is allocated by hv for "early hvlog" and
the other one is allocated by SOS. Once SOS allocate the later one, the
hv allocated sbufs would be released after the contents being copied, we
call it sbuf switch.

And there is a trick here to guarantee that the switch of a certain per_cpu
sbuf is being done on exactly the certain physical CPU, that is doing the
switch at the first print after SOS allocated and setup its sbuf.

Because there are few logmsg within our current code, so will wait a bit long
for the next print. For ordinary case, it should be ok. However, for the
BTM(Boot Time Measurement) case, we need the content of "early hvlog" for
boot time calculation and it is not ok. So, we print those prints to force
the sbuf switch.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:49:09 +08:00
Zide Chen 8f16faab04 HV: further cleanup of header inclusions
According to the comments in hypervisor:
 " This file includes config header file "bsp_cfg.h" and other
	hypervisor used header files.
	It should be included in all the source files."

this patch includes all common header files in hypervisor.h
then removes other redundant inclusions

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-05-25 10:45:56 +08:00
Zide Chen d594878e31 HV: cleanup for header inclusions.
used https://gitlab.com/esr/deheader to detect and remove unnecessary
header file inclusions

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-05-25 10:45:56 +08:00
Mingqiang Chi 7c9cc6bcd4 hv:Merge dump_interrupt and dump_exception to a commond API
merge these two APIs to 'dump_intr_excp_frame'

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-23 13:38:52 +08:00
Mingqiang Chi d88b968305 hv: Remove nested check when dump exception
removed unnecessary nested check when dump exception

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-23 13:38:52 +08:00
Mingqiang Chi 8384ed2564 hv:rename data structure intr_ctx
rename intr_ctx to intr_excp_ctx

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-23 13:38:52 +08:00
Yin Fengwei 6ef48fa30e hv: Add reboot shell command
To trigger warm reboot for debugging.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-05-18 16:38:40 +08:00
Yin Fengwei 03a3fb0d2a hv: cleanup the shell cmd code.
Remove cmd register API. And use static pre-defined cmd array
instead.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-05-18 10:53:34 +08:00
Li, Fei1 edb26a7e17 hv: refine the left atomic operation
rename atomic_cmpxchg_int to atomic_cmpxchg
replace atomic_cmpset_long with atomic_cmpxchg64
rename atomic_readandclear_long to atomic_readandclear64

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1 1f3da93e74 hv: refine atomic_load/store_xxx name
rename atomic_load/store_xxx32 to atomic_load/store
rename atomic_load/store_xxx64 to atomic_load64/store64

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1 fadaf14a94 hv: refine atomic_xadd
1. rename atomic_xadd_int to atomic_xadd, add atomic_xadd64.
2. add atomic_add/sbu64_return, atomic_inc/dec64_return.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1 bd3f3b00f7 hv: fix incorrect use of atomic_set_xxx
1. vpic_wire_mode no need to atomically set its value.
2. uart open conut want to atomically set its value not atomically set
its bits.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 10:52:31 +08:00
Yonghua Huang 85716e8b01 security: fix issues reported by Klocwork
- NULL pointer reference risk
 - buffer overflow risk

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:25:57 +08:00