Commit Graph

545 Commits

Author SHA1 Message Date
Yang, Yu-chu 8779e4fd20 HV: uart16550: check the denominator before use
To prevent the value is devided by zero, checks the denominator
before the calculation. Adding the if statement to check before use.
If the baud_rate is equal to zero, using default baud_rate.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2018-07-06 11:33:36 +08:00
Xiangyang Wu b5b83ca0d8 HV:CPU:Clean up variable type for CPU module
There are some implicit type conversion in the CPU module,
this voilates MISRA C:2012 required rules.

We walk through each functions of CPU module, update
some variable type and the return value type of
the function, and add 'U/UL' for related const value.

V1-->V2:
        Rebase the branch, resolve some conflict.
V2-->V3:
        Update commit info for V2.
V3-->V4:
        Few updates for fixing error instroduced during
	resolving conflict.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
2018-07-06 11:32:50 +08:00
Junjie Mao db62c23d81 HV: vioapic: use uint8_t for pins
IOAPIC pins always fit in 8-bit and we already use uint8_t for virt_pins. This
patch converts pins in vioapic to uint8_t.

This is based on Arindam's previous patch ("was: hv: Cleanup and optimise
vioapic.c"), with SOS boot failure resolved, format string updated, complex
arithmetic expression with implicit type conversion decoupled. Also make some
local variables representing interrupt vectors uint32_t.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-05 15:54:52 +08:00
Geoffroy Van Cutsem f7d78289ee Documentation: add pictures to Trusty documentation
A couple of diagram were written using text characters. This
commit changes that to use pictures instead.

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-07-05 00:06:51 -07:00
Geoffroy Van Cutsem d24179550e Documentation: move Trusty documentation to doc/
Move the existing Trusty document to the doc/ folder (where
it belongs) and convert the text to ReST.

The Documentation/ folder under hypervisor/ is removed as all
documents should be put under doc/.

All technical information has been preserved or was already
available in other documents.

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-07-05 00:06:51 -07:00
Mingqiang Chi 666430a3d4 hv:fix "missing for discarded return value" for memset
No need to check the return value for memset
code like this:
int a(void) {
	return 0;
}
int b(void){
	a();
}
fix as follow:
int a(void) {
	return 0;
}
int b(void){
	(void)a();
}

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-05 14:14:48 +08:00
Junjie Mao 91ef6ed59b HV: instr_emul: enforce unsignedness when possible
Most of variables used when decoding instructions are unsigned bit-fields. This
patch adds the 'U' or 'UL' suffix to constants in unsigned context and changes
the type of arguments/local variables when necessary.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-05 13:14:07 +08:00
Junjie Mao 62865d0397 HV: instr_emul: make SEG_DESC_* macros having type bool
The SEG_DESC_* macros are mostly used as branch conditions though they evaluates
to signed int. This patch simplies their definitions and drop the unnecessary
casts accordingly.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-05 13:14:07 +08:00
Junjie Mao ecce1e6ae4 HV: instr_emul: make integer conversion explicit
This patch makes necessary integer narrowing and/or signedness conversion
explicit.

While some narrowing are expected behavior, the correctness of the others relies
on the specifications of some interfaces (e.g. the higher 32-bit of what
exec_vmread() returns is all 0s if the given field is 32-bit). Add a stub
for now to avoid missing them.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-05 13:14:07 +08:00
Junjie Mao 158242d507 HV: instr_emul: enforce unsignedness of VIE_OP constants
Translate the VIE_OP_* enum constants (which belong to an anonymous enum type)
to macros to ensure that they are always unsigned.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-05 13:14:07 +08:00
Junjie Mao 479dacc219 HV: instr_emul: convert cpl to uint8_t
CPL is represented by a plain int but calculated from shifts and bit-wise
operations. Convert it the uint8_t for consistency.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-05 13:14:07 +08:00
Junjie Mao ab156c9633 HV: instr_emul: convert return value of get_vmcs_field to unsigned
get_vmcs_field() returns a VMCS field offset which is normally unsigned, but it
also returns negatives (-1 here) on invalid arguments. Following the convention
we use for vectors, pins, etc., use a special unsigned value to indicate such
errors.

v1 -> v2:

    * Use a special value (VMX_INVALID_VMCS_FIELD) instead of a seperate output
      parameter to indicate errors.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-05 13:14:07 +08:00
Junjie Mao d457874cf5 treewide: instr_emul: rename vm_reg to cpu_reg
The current register names in instr_emul are misleading since the register names
are not VM-specific. Rename VM_REG(_GUEST) to CPU_REG in both the hypervisor and
device model.

v1 -> v2:

    * Introduced.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-05 13:14:07 +08:00
Junjie Mao 845437646f HV: instr_emul: keep using enum vm_reg_name for registers
The vm_reg_name is a good example of a collection of discrete values. This patch
replaces signed integers with this type whenever applicable to avoid dependence
on the underlying value of such enumeration constants.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-05 13:14:07 +08:00
Junjie Mao edc793145a HV: instr_emul: convert sizes to uint8_t
Op_sizes are mostly from vie->opsize which is a 4-bit field in struct vie. Use
uint8_t instead of int to represent them.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-05 13:14:07 +08:00
Junjie Mao bbb6920a75 HV: instr_emul: replace u_long with uint64_t
Rflags is always 64-bit. Spell out the width explicitly and drop the unused
typedef'ed u_long type.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-05 13:14:07 +08:00
Yonghua Huang 3f9b0d53f5 HV: rename functions in cpu.c
- rename 'cpu_set_logical_id()' to 'set_current_cpu_id()'
- rename 'cpu_find_logical_id()' to 'get_cpu_id_from_lapic_id()'
- some clean up in cpu.c & trampolines.s

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-07-05 12:45:44 +08:00
Huihuang Shi 96372ed09c HV:misc:add suffix U to the numeric constant
Add suffix U to the numeric constant

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-05 11:29:46 +08:00
Huihuang Shi d3ad411c91 HV:lib:add suffix U to the numeric constant
Add suffix U to the numeric constant

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-05 11:29:46 +08:00
Huihuang Shi d3bd514e58 HV:common:add suffix U to the numeric constant
Add suffix U to the numeric constant

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-05 11:29:46 +08:00
Huihuang Shi 98c49c71b7 HV:guest:add suffix U to the numeric constant
Add suffix U to the numeric constant

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-05 11:29:46 +08:00
Xiangyang Wu b74358d08e HV:treewide:string assigned to const object
In the hypervisor, some strings are assigned to non const
object, this violates MISRA C:2012.

Update the type of the object as const type since it always
points to string.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
2018-07-05 11:13:51 +08:00
Jason Chen CJ 6ca99713dd Revert "hv: More changes to enable GPU passthru"
This reverts commit 8d50d40ff8.
2018-07-05 11:06:47 +08:00
Yin Fengwei cfb2828585 hv: Avoid inject the same int to target vcpu multiple times
Once the specific interrupt is marked waiting for inject to
target vcpu, we don't need to mark it again if the same
interrupt is request to inject to same target vcpu.

One example is UP SOS + SMP UOS. It's possible that different
core of UOS try to notify SOS vcpu that there is ioreq pending.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-05 10:01:15 +08:00
Yin Fengwei fdd785d669 hv: Add 32bit bitmap bit ops API
We need bitmap bit ops API for 32bit operators like vlapic irr
registers.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-05 10:01:15 +08:00
Mingqiang Chi 9d8893e499 hv:rename several APIs in vlapic.c
rename 4 APIs:
  x2apic_msr -> is_ x2apic_msr
  vlapic_msr -> is_vlapic_msr
  vlapic_mmio_write -> vlapic_write_mmio_reg
  vlapic_mmio_read -> vlapic_read_mmio_reg

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-07-05 10:00:43 +08:00
Yonghua Huang cc7167026b HV: cleanup coding style violation
- replace MACROs with inline functions
 - remove unused local viarbles
 - fix build errors

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-07-05 10:00:14 +08:00
Xiangyang Wu fa98b574fa HV:CPU:Update logical_id type as uint_16 and rename logical_id
There are extra type conversion in the HV since logical_id
type is uint32_t and the input argument of bitmap operations
is uint16_t. BTW, the name of logical_id is not clear enough
to express its usage.

So the following updates are made in this patch:
Update logical_id type as unit_16 to reduce type casting;
Update related print argument;
Rename related logical_id as pcpu_id as needed.

Note: logical_id in the interrupt_init definition have been
updated in cpu_id cleanup patch.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
2018-07-04 18:13:41 +08:00
Yonghua Huang b332410f0c HV: Fix coding style violation of MISRA in string.c
- update 'strtol_deci()' & 'strtoul_hex()'

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 17:28:23 +08:00
Xiangyang Wu b76c92bf3e HV:treewide:Update cpu_id type as uint_16
There are extra type conversion in the HV since cpu_id
type is uint32_t and the return value type of get_cpu_id
is uint16_t. BTW, the name of cpu_id is not clear enough
to express its usage.

So the following updates are made in this patch:
Update cpu_id type as unit_16 to reduce type casting;
Update related temporary variables type;
Update related print argument;
Change the input parameter name of interrupt_init as
cpu_id to keep align with function implement;
Rename cpu_id as pcpu_id as needed.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 16:39:26 +08:00
Xiangyang Wu 188210ab03 HV:Treewide:Update the type of vcpu id as uint16_t
In the hypervisor, virtual cpu id is defined as "int" or "uint32_t"
type in the hypervisor. So there are some sign conversion issues
about virtual cpu id (vcpu_id) reported by static analysis tool.
Sign conversion violates the rules of MISRA C:2012.

BTW, virtual cpu id has different names (vcpu_id, cpu_id, logical_id)
 for different modules of HV, its type is defined as "int" or "uint32_t"
in the HV. cpu_id type and logical_id type clean up will be done in
other patchs.

V1-->V2:
         More clean up the type of vcpu id;
         "%hu" is for vcpu id in the print function.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
2018-07-04 14:28:52 +08:00
Huihuang Shi b3fa2efe56 public:fix "signed/unsigned conversion without cast"
Misra C required signed/unsigned conversion with cast.

V1->V2:
  a.split patch to patch series

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 12:18:38 +08:00
Huihuang Shi ac7ba6c47f HV:lib:fix "signed/unsigned conversion without cast"
Misra C required signed/unsigned conversion with cast.

V1->V2:
  a.split patch to patch series

V2->V3:
  a.change the uint64_t type numeric constant's suffix from U to UL

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 12:18:38 +08:00
Huihuang Shi 2ffa69cb9a HV:misc:fix "signed/unsigned conversion without cast"
Misra C required signed/unsigned conversion with cast.

V1->V2:
  a.split patch to patch series

V2->V3:
  a.change the uint64_t type numeric constant's suffix from U to UL

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 12:18:38 +08:00
Huihuang Shi 95736e659f HV:interrupt:fix "signed/unsigned conversion without cast"
Misra C required signed/unsigned conversion with cast.

V1->V2:
  a.split patch to patch series

V2->V3:
  a.change the uint64_t type numeric constant's suffix from U to UL

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 12:18:38 +08:00
Huihuang Shi 102d2f1a68 HV:common:fix "signed/unsigned conversion without cast"
Misra C required signed/unsigned conversion with cast.

V1->V2:
  a.split patch to patch series

V2->V3:
  a.change the uint64_t type numeric constant's suffix from U to UL

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 12:18:38 +08:00
Huihuang Shi 91fdffb19a HV:debug:fix "signed/unsigned conversion without cast"
Misra C required signed/unsigned conversion with cast.

V1->V2:
  a.split patch to patch series

V2->V3:
  a.Change the API tgt_uart/ static int uart16550_get_rx_err(uint32_t rx_data) to return uint32_t
  b.modified the format of if from "if (length > 32*(length/32))" to
"if (length % 32U > 0)"

V3->V4:
  a.change the uint64_t type numeric constant's suffix from U to UL

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 12:18:38 +08:00
Huihuang Shi 8b94957774 HV:guest:fix "signed/unsigned conversion without cast"
Misra C required signed/unsigned conversion with cast.

V1->V2:
  a.split patch to patch series

V2->V3:
  a.change the uint64_t type numeric constant's suffix from U to UL

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 12:18:38 +08:00
Junjie Mao a27f33f9bc HV: debug: make log severity constants unsigned
logmsg() expects the severity given to be uint32_t. This patch adds the 'U'
suffix to the severity constants.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 09:13:34 +08:00
Kaige Fu 4cd27a5ddd HV: Don't pass retval to vmm_emulate_instruction()
We pass retval to vmm_emulate_instruction and assign the return value to retval
at the same time. The retval will be passed to mmio_read/write finally as memarg
and the functions don't use the parameter actually. Apparently, we misused the
retval.

This patch fix it by passing 'NULL' to vmm_emulate_instruction.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 09:12:52 +08:00
Xiangyang Wu 50f06cad55 HV:treewide: Rename bit operation function fls as fls32
Rename bit operation function fls as fls32, keep name
style with other bit operation function.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-03 17:12:54 +08:00
Kaige Fu 8afbe66fe9 HV: Fix wrong log message in init_host_state
There are some cases that we write to VMX_HOST_XXX regs but have debug message
like "pr_dbg("VMX_GUEST_XXX ...")".

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-03 17:09:58 +08:00
Junjie Mao e75cca64c8 HV: timer: keep TSC frequency in KHz
This patch represents TSC freqeuency in KHz using a 32-bit unsigned integer.

The conversion macros between ticks and us/ms are changed to inline functions to
enforce the types of the input parameters. Note that us_to_ticks accepts only
uint32_t (~4K us at most) and never overflows.

Results of some unit tests on the conversion functions:

    calibrate_tsc, tsc_khz=1881600
    64us -> ticks: 120422
    64us -> ticks -> us: 63
    511us -> ticks: 961497
    511us -> ticks -> us: 510
    1280000 ticks -> us: 680
    1280000 ticks -> us -> ticks: 1279488

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-03 10:18:06 +08:00
Junjie Mao ffc0b27db4 HV: lib: make the argument to udelay unsigned
The parameter to udelay is the microseconds to wait for, which should be an
unsigned integer.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-03 10:18:06 +08:00
Yonghua Huang 228f4df559 HV: coding style cleanup in string.c
- replaced blank space with tab
- delete some confusing comments

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-07-03 09:41:01 +08:00
Yin Fengwei 2a819366ae hv: add ioapic reset function
ioapic reset function will be called when doing guest reset.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 16:12:54 +08:00
Yin Fengwei 8b9fb3780a hv: avoid memory leak in init_msr_emulation
If the vcpu->guest_msrs was allocated, don't allocate the memory
again to avoid memory leak when init_msr_emulation is called
more than once.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 16:12:54 +08:00
Yin Fengwei 57c217bf26 hv: extend the vlapic_reset
vlapic reset should also zero apic_page and pir_desc if pir is
enabled.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 16:12:54 +08:00
Xiangyang Wu a97593e7db HV:treewide:Update return type of function ffs64 and ffz64
To reduce type conversion in HV:
Update return type of function ffs64 and ffz64 as uint16;
For ffs64, when the input is zero, INVALID_BIT_INDEX is returned;
Update temporary variable type and return value check of caller
when it call ffs64 or ffz64;

Note: In the allocate_mem, there is no return value checking for
calling ffz64, this will be updated latter.

V1-->V2:
        INVALID_BIT_INDEX instead of INVALID_NUMBER
        Coding style fixing;
        INVALID_CPU_ID instead of INVALID_PCPU_ID or INVALID_VCPU_ID;
        "%hu" is used to print vcpu id (uint16_t);
        Add "U/UL" for constant value as needed.
V2-->V3:
        ffs64 return INVALID_BIT_INDEX directly when
        the input value is zero;
        Remove excess "%hu" updates.
V3-->V4:
        Clean up the comments of ffs64;
        Add "U" for constant value as needed.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 15:11:22 +08:00
Xiangyang Wu db01efa047 HV:treewide:Update return type for function fls64 and clz64
Change the return type of function fls64 and clz64 as uint16_t;
When the input is zero, INVALID_ID_INDEX is returned;
Update temporary variable type and return value check of caller
when it call fls64 or clz64;
When input value is zero, clz64 returns 64 directly.

V1-->V2:
        INVALID_BIT_INDEX instead of INVALID_NUMBER;
        Partly revert apicv_pending_intr udpates;
        Add type conversion as needed;
        Coding style fixing.
V2-->V3:
        Correct type conversion;
        fls64 return INVALID_BIT_INDEX directly when
        the input value is zero.
V3-->V4:
        No updates for this part in PATCH V4.

Note: For instruction "bsrq", destination register value
      is undefined when source register value is zero.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 15:11:22 +08:00