hv:rename several APIs in vlapic.c
rename 4 APIs: x2apic_msr -> is_ x2apic_msr vlapic_msr -> is_vlapic_msr vlapic_mmio_write -> vlapic_write_mmio_reg vlapic_mmio_read -> vlapic_read_mmio_reg Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
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@ -1807,7 +1807,7 @@ vlapic_intr_msi(struct vm *vm, uint64_t addr, uint64_t msg)
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}
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static bool
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x2apic_msr(uint32_t msr)
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is_x2apic_msr(uint32_t msr)
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{
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if (msr >= 0x800 && msr <= 0xBFF)
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return true;
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@ -1823,10 +1823,10 @@ x2apic_msr_to_regoff(uint32_t msr)
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}
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bool
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vlapic_msr(uint32_t msr)
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is_vlapic_msr(uint32_t msr)
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{
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if (x2apic_msr(msr) || (msr == MSR_IA32_APIC_BASE))
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if (is_x2apic_msr(msr) || (msr == MSR_IA32_APIC_BASE))
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return true;
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else
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return false;
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@ -1910,7 +1910,7 @@ vlapic_wrmsr(struct vcpu *vcpu, uint32_t msr, uint64_t val)
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}
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int
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vlapic_mmio_write(struct vcpu *vcpu, uint64_t gpa, uint64_t wval, int size)
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vlapic_write_mmio_reg(struct vcpu *vcpu, uint64_t gpa, uint64_t wval, int size)
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{
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int error;
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uint64_t off;
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@ -1931,7 +1931,7 @@ vlapic_mmio_write(struct vcpu *vcpu, uint64_t gpa, uint64_t wval, int size)
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}
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int
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vlapic_mmio_read(struct vcpu *vcpu, uint64_t gpa, uint64_t *rval,
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vlapic_read_mmio_reg(struct vcpu *vcpu, uint64_t gpa, uint64_t *rval,
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__unused int size)
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{
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int error;
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@ -1965,14 +1965,14 @@ int vlapic_mmio_access_handler(struct vcpu *vcpu, struct mem_io *mmio,
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"All RW to LAPIC must be 32-bits in size");
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if (mmio->read_write == HV_MEM_IO_READ) {
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ret = vlapic_mmio_read(vcpu,
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ret = vlapic_read_mmio_reg(vcpu,
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gpa,
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&mmio->value,
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mmio->access_size);
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mmio->mmio_status = MMIO_TRANS_VALID;
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} else if (mmio->read_write == HV_MEM_IO_WRITE) {
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ret = vlapic_mmio_write(vcpu,
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ret = vlapic_write_mmio_reg(vcpu,
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gpa,
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mmio->value,
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mmio->access_size);
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@ -58,12 +58,14 @@ void vlapic_intr_accepted(struct vlapic *vlapic, uint32_t vector);
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struct vlapic *vm_lapic_from_vcpuid(struct vm *vm, uint16_t vcpu_id);
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struct vlapic *vm_lapic_from_pcpuid(struct vm *vm, uint16_t pcpu_id);
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bool vlapic_msr(uint32_t num);
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bool is_vlapic_msr(uint32_t num);
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int vlapic_rdmsr(struct vcpu *vcpu, uint32_t msr, uint64_t *rval);
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int vlapic_wrmsr(struct vcpu *vcpu, uint32_t msr, uint64_t wval);
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int vlapic_mmio_read(struct vcpu *vcpu, uint64_t gpa, uint64_t *rval, int size);
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int vlapic_mmio_write(struct vcpu *vcpu, uint64_t gpa, uint64_t wval, int size);
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int vlapic_read_mmio_reg(struct vcpu *vcpu, uint64_t gpa,
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uint64_t *rval, int size);
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int vlapic_write_mmio_reg(struct vcpu *vcpu, uint64_t gpa,
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uint64_t wval, int size);
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/*
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* Signals to the LAPIC that an interrupt at 'vector' needs to be generated
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