Revert "hv: More changes to enable GPU passthru"

This reverts commit 8d50d40ff8.
This commit is contained in:
Jason Chen CJ 2018-07-05 09:04:08 +08:00 committed by lijinxia
parent cfb2828585
commit 6ca99713dd
6 changed files with 12 additions and 11 deletions

View File

@ -489,7 +489,7 @@ int ept_mmap(struct vm *vm, uint64_t hpa,
* to force snooping of PCIe devices if the page
* is cachable
*/
if ((prot & IA32E_EPT_MT_MASK) != IA32E_EPT_UNCACHED && iommu_snoop)
if ((prot & IA32E_EPT_MT_MASK) != IA32E_EPT_UNCACHED)
prot |= IA32E_EPT_SNOOP_CTRL;
map_mem(&map_params, (void *)hpa,
(void *)gpa, size, prot);

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@ -152,8 +152,6 @@ struct iommu_domain {
uint64_t trans_table_ptr;
};
bool iommu_snoop = true; /* enable iommu snoop control */
static struct list_head dmar_drhd_units;
static uint32_t dmar_hdrh_unit_count;
@ -421,13 +419,9 @@ static void dmar_register_hrhd(struct dmar_drhd_rt *dmar_uint)
* How to guarantee it when EPT is used as second-level
* translation paging structures?
*/
/* enable snoop control only if it is supported by all the VT-d engines */
if (!iommu_ecap_sc(dmar_uint->ecap)) {
if (iommu_ecap_sc(dmar_uint->ecap) == 0U)
dev_dbg(ACRN_DBG_IOMMU,
"dmar uint doesn't support snoop control!");
iommu_snoop = false;
}
dmar_uint->max_domain_id = iommu_cap_ndoms(dmar_uint->cap) - 1;
@ -1015,6 +1009,7 @@ static int add_iommu_device(struct iommu_domain *domain, uint16_t segment,
ASSERT(false,
"dmaru doesn't support trans passthrough");
} else {
/* TODO: add Device TLB support */
upper =
DMAR_SET_BITSLICE(upper, CTX_ENTRY_UPPER_AW,
width_to_agaw(

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@ -270,6 +270,13 @@ handle_one_drhd(struct acpi_dmar_hardware_unit *acpi_drhd,
consumed = handle_dmar_devscope(dev_scope, cp, remaining);
if (((drhd->segment << 16) |
(dev_scope->bus << 8) |
dev_scope->devfun) == CONFIG_GPU_SBDF) {
ASSERT(dev_count == 1, "no dedicated iommu for gpu");
drhd->ignore = true;
}
if (consumed <= 0)
break;

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@ -33,7 +33,7 @@ static struct dmar_drhd drhd_info_array[] = {
/* Ignore the iommu for intel graphic device since GVT-g needs
* vtd disabled for gpu
*/
.ignore = false,
.ignore = true,
.devices = default_drhd_unit_dev_scope0,
},
{

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@ -21,6 +21,7 @@
#define CONFIG_RAM_START 0x20000000
#define CONFIG_RAM_SIZE 0x02000000 /* 32M */
#define CONFIG_DMAR_PARSE_ENABLED 1
#define CONFIG_GPU_SBDF 0x00000010 /* 0000:00:02.0 */
#define CONFIG_EFI_STUB 1
#define CONFIG_UEFI_OS_LOADER_NAME "\\EFI\\org.clearlinux\\bootloaderx64.efi"
#define CONFIG_MTRR_ENABLED 1

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@ -206,8 +206,6 @@ struct dmar_info {
extern struct dmar_info *get_dmar_info(void);
extern bool iommu_snoop;
struct iommu_domain;
/* Assign a device specified by bus & devfun to a iommu domain */