Commit Graph

927 Commits

Author SHA1 Message Date
Alek Du 4eae78cb71 cbc: fix the install issue when do make misc-install only
The install -D is misleading people since it only creates the leading
directories.

The problem was hidden due to we always call make install and the
destination folder was already created in previous install script.

Signed-off-by: Alek Du <alek.du@intel.com>
2018-07-03 15:32:11 +08:00
Kaige Fu 5907400182 tools: acrntrace: Remove unused pre_process.sh
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-07-03 10:19:31 +08:00
Kaige Fu ad89a22011 tools: acrntrace: Make all python scripts python3 module
The trend is to focus on Python3 and deprecate Python2. This patch make all the
acrntrace related scripts as Python3 module.

  - Add parentheses to all the print as Python3 required.

  - Remove suffix L and long() Python3 has deprecated. Python3 will treat all
    intergers as long.

  - Replace has_key() with "key in .keys()" because has_key() has been deprecated.

  - Other minor fixes.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-07-03 10:19:31 +08:00
Junjie Mao e75cca64c8 HV: timer: keep TSC frequency in KHz
This patch represents TSC freqeuency in KHz using a 32-bit unsigned integer.

The conversion macros between ticks and us/ms are changed to inline functions to
enforce the types of the input parameters. Note that us_to_ticks accepts only
uint32_t (~4K us at most) and never overflows.

Results of some unit tests on the conversion functions:

    calibrate_tsc, tsc_khz=1881600
    64us -> ticks: 120422
    64us -> ticks -> us: 63
    511us -> ticks: 961497
    511us -> ticks -> us: 510
    1280000 ticks -> us: 680
    1280000 ticks -> us -> ticks: 1279488

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-03 10:18:06 +08:00
Junjie Mao ffc0b27db4 HV: lib: make the argument to udelay unsigned
The parameter to udelay is the microseconds to wait for, which should be an
unsigned integer.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-03 10:18:06 +08:00
Yonghua Huang 228f4df559 HV: coding style cleanup in string.c
- replaced blank space with tab
- delete some confusing comments

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-07-03 09:41:01 +08:00
Yin Fengwei 2a819366ae hv: add ioapic reset function
ioapic reset function will be called when doing guest reset.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 16:12:54 +08:00
Yin Fengwei 8b9fb3780a hv: avoid memory leak in init_msr_emulation
If the vcpu->guest_msrs was allocated, don't allocate the memory
again to avoid memory leak when init_msr_emulation is called
more than once.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 16:12:54 +08:00
Yin Fengwei 57c217bf26 hv: extend the vlapic_reset
vlapic reset should also zero apic_page and pir_desc if pir is
enabled.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 16:12:54 +08:00
Yuan Liu 21b9ba8a84 misc: disable cbc_lifecycle service always restart by systemd
Due to cbc_lifecycle service already has its own retry mechanism,so change the
Restart type to "no".

This change is also indirectly avoid cbc_lifecycle always restart for the
non-IOC boards. Actually, there has one defect for current IOC CBC architecture
due to lack IOC hardware detection mechanism. The related guys are already aware
it and WIP.

Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Reviewed-by: Alex Du <alek.du@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
2018-07-02 15:25:12 +08:00
Xiangyang Wu a97593e7db HV:treewide:Update return type of function ffs64 and ffz64
To reduce type conversion in HV:
Update return type of function ffs64 and ffz64 as uint16;
For ffs64, when the input is zero, INVALID_BIT_INDEX is returned;
Update temporary variable type and return value check of caller
when it call ffs64 or ffz64;

Note: In the allocate_mem, there is no return value checking for
calling ffz64, this will be updated latter.

V1-->V2:
        INVALID_BIT_INDEX instead of INVALID_NUMBER
        Coding style fixing;
        INVALID_CPU_ID instead of INVALID_PCPU_ID or INVALID_VCPU_ID;
        "%hu" is used to print vcpu id (uint16_t);
        Add "U/UL" for constant value as needed.
V2-->V3:
        ffs64 return INVALID_BIT_INDEX directly when
        the input value is zero;
        Remove excess "%hu" updates.
V3-->V4:
        Clean up the comments of ffs64;
        Add "U" for constant value as needed.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 15:11:22 +08:00
Xiangyang Wu db01efa047 HV:treewide:Update return type for function fls64 and clz64
Change the return type of function fls64 and clz64 as uint16_t;
When the input is zero, INVALID_ID_INDEX is returned;
Update temporary variable type and return value check of caller
when it call fls64 or clz64;
When input value is zero, clz64 returns 64 directly.

V1-->V2:
        INVALID_BIT_INDEX instead of INVALID_NUMBER;
        Partly revert apicv_pending_intr udpates;
        Add type conversion as needed;
        Coding style fixing.
V2-->V3:
        Correct type conversion;
        fls64 return INVALID_BIT_INDEX directly when
        the input value is zero.
V3-->V4:
        No updates for this part in PATCH V4.

Note: For instruction "bsrq", destination register value
      is undefined when source register value is zero.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 15:11:22 +08:00
Xiangyang Wu 13d354e7a6 HV:treewide:Update return type for bit operations fls and clz
Change the return type of function fls and clz as uint16_t;
When the input is zero, INVALID_BIT_INDEX is returned;
Update temporary variable type and return value check of caller
when it call fls or clz;
When input value is zero, clz returns 32 directly.

V1-->V2:
        INVALID_BIT_INDEX instead of INVALID_NUMBER;
        Add type conversion as needed;
        Add "U/UL" for constant value as needed;
        Codeing style fixing.
V2-->V3:
       Use type conversion to remove side effect of
       the variable which stores fls/clz return value;
       fls return INVALID_BIT_INDEX directly when the
       input value is zero.
V3-->v4:
       Clean up comments for fls.

Note: For instruction "bsrl", destination register value
      is undefined when source register value is zero.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 15:11:22 +08:00
Kaige Fu 4110f3a87f HV: Remove unnecessary vm0 check in vm0 specific func
Function prepare_vm0_memmap_and_e820 and init_vm0_boot_info are specific for vm0.
There is no need to check is_vm0 again in those functions.

This patch remove the unnecssary checks.

v1 -> v2:
   - Add pre-condition comment before the function as Junjie's suggestion.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 15:07:55 +08:00
Junjie Mao cfc3811a0a HV: treewide: drop debug-only helpers in release build
There are multiple helpers for collecting info to be printed on the ACRN uart
console. They are unreachable code in release builds in which the uart console
is removed.

To define a precise boundary for safety-related activities, this patch wraps the
declarations and definitions to these helpers with "#ifdef HV_DEBUG" so that
these unreachable APIs will be dropped in release builds.

v1 -> v2:

    * Fix coding style: no empty lines between #ifdef and the wrapped code.
    * Also drop get_rte_info() in ioapic.c, which is solely used by
      get_ioapic_info().

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 14:35:39 +08:00
Zheng, Gen 8b1c5a7cba HV: bug fix on emulating guest IPI
With current code, the INIT-STARTUP IPI with EXCLUDING_SELF shorthand
cannot be handled.

This patch is to correct hypervisor to emulate IPI with different
delivery_mode & shorthand.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-02 12:48:32 +08:00
Yonghua Huang 61cd6946d0 DM: Remove 'strictio' from UOS bootargs' options
- UOS will boot fail if 'strictio' is enabled ('-e' option), in this
   case (with '-e'), device model will block all PIO accesses whose
   handlers were not registered, after that, device model program will
   exit, hence UOS boot fail.

   actually, such kind of accesses exist, e.g. UOS would program
   PIT registers (port address: 0x43) if hpet is disabled.

 - For debug, we can trap unexpected PIO access in 'default_inout()'

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-07-02 12:33:52 +08:00
Zide Chen 9f4404d0e6 hv: add context->vmx_ia32_pat to save and restore VMCS
Similar to cr0/4:
- use context->vmx_ia32_pat to save/restore VMX_GUEST_IA32_PAT field
- use context->ia32_pat to keep track the guest' view of IA32_PAT MSR

Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 12:33:06 +08:00
Zide Chen d0df39cbb5 hv: emulate CR0.CD and CR0.NW
This patch makes use of IA32_PAT MSR to emulate cache disabled behaviour

When the guest is requesting to set CR0.CD:
 - Keep guest's CR0.CD and CR0.NW bits unchanged
 - Write IA32_PAT MSR with all-UC entries to change the effective memory
   type for all GPA to UC for the guest VCPU
 - It depends on trapping wrmsr to IA32_PAT to prevent any entry in
   IA32_PAT being changed to non UC type by the guest

When the guest is requesting to clear CR0.CD:
 - restore the content of guest's IA32_PAT MSR

Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 12:33:06 +08:00
Zide Chen 6801d826e2 hv: intercept IA32_PAT MSR
Preparing for emulating guest's CR0.CD and CR0.NW bits:
 - Intercept both rdmsr and wrmsr for IA32_PAT
 - Track guest's IA32_PAT MSR with vcpu.arch_vcpu.contexts.ia32_pat

Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 12:33:06 +08:00
Yonghua Huang 873e90cd9a HV: Fix compiler warnings in string.c
- fix below warnings when compiling

 lib/string.c: In function 'strtoul_hex':
 lib/string.c:25:26: warning: suggest parentheses around comparison in
 operand of '&' [-Wparentheses]

 .define ISSPACE(c) (((c) & 0xFFU == ' ') || ((c) & 0xFFU == '\t'))

- remove redundant MACROs in string.c

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-07-02 12:32:12 +08:00
Huihuang Shi b068959b78 HV:change the cpu state to enum type
enum cpu state is better than cpu state macro.

V1->V2:
  move enum cpu_state under #ifndef ASSEMBLER MACRO to avoid
assembler compiler scan.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 11:22:48 +08:00
Mingqiang Chi eaa5418fba hv:merge struct lapic and lapic_regs to lapic_regs
merge these two structures to lapic_regs

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 10:49:14 +08:00
Kaige Fu 7a66c317b5 HV: Remove vm->attr.name
We define attr.name in struct vm and named as ("vm_%d", attr.id). attr.name only
be used in debug tool vm_list. It does't deserve to do so in OS created flow
(aka function create_vm). It's better to handle this in vm_list tool.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@inte.com>
2018-07-02 10:48:36 +08:00
Huihuang Shi 31cdf8c7e8 HV:transfer page_table_type type
struct map_params's member page_table_type is enum _page_table_type,
transferred it.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 10:47:01 +08:00
Kaige Fu b67836f722 HV: Minor refactor to get_guest_paging_info
Add a new parameter csar to get_guest_paging_info. We will save one exec_vmread
in this case.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 10:46:41 +08:00
Kaige Fu 83587b7711 HV: Make all trace event prefix consist with TRACE
There are two prefix (aka TRC and TRACE) for trace event. This patch make all
the trace event prefix consist with TRACE.

No functional change.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 10:46:41 +08:00
Xiangyang Wu cc50165018 HV:treewide:Cleanup the type for parameters of bitmap
operations

For reducing sign conversion in hypervisor:
Update parameters of bitmap operations as unsigned type;
Update the input of related caller as unsigned type when the
caller's input parameter is const variable or the variable is
only used by bitmap operations.

V1-->V2:
        (1) Explicit casting for the first parameter
            of all bitmap operations;
        (2) Remove mask operation for explicit casting
            of all bitmap operations, since masking is
            useless. Otherwise, this trucation is dangerous.
V2-->V3:
        (1) Explicit casting for all bitmap operations parameter;
        (2) Masking bit offset with 6-bit;
        (3) Add few comments about bit offset.
V3-->V4:
        add '\' for some statement of bitmap macro

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 10:46:11 +08:00
Geoffroy Van Cutsem 25eae47836 Documentation: add tutorial to set up a static IP address
Add a tutorial on how to change the default configuration that
uses DHCP and assign a static IP address to the system.

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-06-29 10:48:36 -07:00
Geoffroy Van Cutsem 92d0f3c66b Documentation: fix minor rendering issue in GSG
Fix a minor rendering issue in the Getting Started Guide where a
code-block is not appearing as such.

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-06-29 10:43:03 -07:00
Yuan Liu 7791934cc4 misc: fix cbc_attach blocks APL NUC boot for 20 seconds
This patch resolved systemd be blocking for 20 seconds due to waiting the
"READY=1" from cbc_attach. And cbc_attach will retry 60 sec at the worst case
which can be reproduced on non-IOC boards.

This is one temporary solution. The final solution need modify SBL to export IOC
ACPI device through ACPI table, and also Linux IOC CBC driver need trigger
uevent which should be the trigger of launching cbc_attach service.

This patch changes the service type to simple instead of notify due to systemd is
needn't wait cbc related services. And change Restart to no due to cbc_attach
already has retry mechanism.

These changes are also reasonable for the board integrated IOC component.
So they should be keep even the long term final solution implemented.

Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Reviewed-by: Alex Du <alek.du@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
2018-06-29 16:41:50 +08:00
Huihuang Shi 4de869665e HV:treewide:transfer the struct member types to non-basic types
The struct member types should be transfer to non-basic types,
chaned it to length-prefix(uint32_t,int32_t ...) type.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 15:48:19 +08:00
Yonghua Huang bbdb204750 HV:- Refine strtol() & strtoul()
- replace 'strtol()' with 'strtol_deci()'
    -- supports string with decimal format

 - replace 'strtoul()' with 'strtoul_hex()'
    -- support string with hex format

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 15:47:07 +08:00
Liu, Xinwu 41b39c5e1f tools: acrn-crashlog: Defer the vm events processing when failed
In the original design, acrnprobe marked all handled VMs'events as "synced"
in file vmrecordid(this patch changes the name to VM_eventsID.log).
Currently, the Android log events are not logged if the first attempt at
reading collecting them from the VM fails. This patch changes the logic
so that the acrn-crashlog tool will retry continuously.

This patch defines different tags for handled VMs'events, and only marks
VMs'events "synced" after it returns successfully.

Signed-off-by: Liu, Xinwu <xinwu.liu@intel.com>
Reviewed-by: xiaojin2 <xiaojing.liu@intel.com>
Reviewed-by: Jin Zhi <zhi.jin@intel.com>
Acked-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Acked-by: Chen gang <gang.c.chen@intel.com>
2018-06-29 15:23:18 +08:00
Junjie Mao ccc222d193 HV: vpic: add suffix 'U' to constants in unsigned contexts
Constants represented in an unsigned type should have the 'U' suffix per MISRA C
requirements even for 0 to get rid of implicit signedness conversions which can
be confusing due to the implementation-defined integer formats.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 14:23:16 +08:00
Junjie Mao aadd81941d HV: vpic: spell out conversions to narrower integers
With pins being uint8_t, implicit narrowing conversions arises since unsigned
integer constants, irq IDs and general registers have type ''unsigned
int''. Make such conversions explicit.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 14:23:16 +08:00
Junjie Mao 3e4317bca9 HV: vpic: use uint8_t to represent pins
PIC pin IDs should be logically unsigned, while we currently use ''int'' to
represent them.

Following the convention we use unsigned IDs, this patch converts the
representation of pins to uint8_t. A special value VPIC_INVALID_PIN is
introduced to represent the case when a valid target pin cannot be
found (previously -1 is used for this case). The branch conditions are updated
accordingly, following the convention below.

    (for ''pin''s representing a per-PIC pin)

    if (pin != -1)               ->     if (pin < NR_VPIC_PINS_PER_CHIP)
    if (pin == -1)               ->     if (pin >= NR_VPIC_PINS_PER_CHIP)
    if (pin >= 0 && pin < 8)     ->     if (pin < NR_VPIC_PINS_PER_CHIP)
    if (pin >= 0 && pin <= 7)    ->     if (pin < NR_VPIC_PINS_PER_CHIP)
    if (pin >= 0)                ->     if (pin < NR_VPIC_PINS_PER_CHIP)

    (for ''pin''s representing a pin in the vPIC with 2 cascading PICs)

    if (pin >= 0 && pin <= 15)   ->     if (pin < NR_VPIC_PINS_TOTAL)
    if (pin > 15)                ->     if (pin >= NR_VPIC_PINS_TOTAL)

Related local variables are also changed accordingly.

v1 -> v2:

    * Rename the number of pins per PIC to NR_VPIC_PINS_PER_CHIP, and the number
      of pins of 2 cascading PICs to NR_VPIC_PINS_TOTAL.
    * Using "%hhu" instead of "%d" in format string when a pin is expected.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 14:23:16 +08:00
David B. Kinder 3965593df6 doc: reorganize documentation
We've been expanding documentation, and now need to organize things a bit
cleaner and separate content into new major folders: Introduction, Getting
Started, User Guides, Developer Guides, Tutorials, and Release notes..

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-06-28 22:36:13 -07:00
Huihuang Shi 5c75f29a2d modified the lapic_id type to uint8_t
According intel mannual and ACPI mannual,lapic_id length is 1 byte.

V1->V2:
  Add U suffix to the numeric when do arithmetic operation on lapic.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 13:16:02 +08:00
Li, Fei1 6f097b1633 dm: remove set vm memory by cma
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-06-29 13:11:48 +08:00
Li, Fei1 652e37e908 dm: use hugetlb by default
use hugetlb to set vm memory by default.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-06-29 13:11:48 +08:00
Kaige Fu 136d5c30fb tools: acrntrace: Add irq related analyzer
This analyzer is implemented in vmexit_analyze. This patch make it as independent
analyzer with an option "--irq"

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-06-29 13:05:27 +08:00
Kaige Fu 8a233eec63 tools: acrntrace: Refactor vmexit_analyzer based on new trace format
- Refactor vmexit_analyzer based on new trace format (raw data). We can get
    the same output like original implementation.

  - Remove irq related analysis. Will add it back with an option "--irq".

  - Remove unused VMEXIT_EPT_VIOLATION_GVT

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-06-29 13:05:27 +08:00
Kaige Fu 2bdd8112bd tools: acrntrace: Using array for saving all analyzer
As we may analyze multi-cases at the same time. It's better to store all the
analyzer in an array. Then we can traverse the array and exec all analyzer one
by one.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-06-29 13:05:27 +08:00
Kaige Fu 2aa0d4074f tools: acrntrace: Make TSC frequency configurable
Originally, acrntrace stores cpu frequency in output file and use it for time-based
analysis. Actually, we should use TSC frequency instead of cpu frequency.

This patch change to using TSC frequency for time-based analysis and introduce
an option "-f --frequency" to let user configure TSC frequency.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-06-29 13:05:27 +08:00
Kaige Fu 0d9b163875 tools: acrntrace: Add new tool acrntrace_format
acrntrace_format.py is used for parsing raw trace data to human-readable file on
given format. A sample format file for acrntrace predefined trace events is available
in tools/acrntrace/scripts/formats in acrn source tree.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-06-29 13:05:27 +08:00
Kaige Fu a35a650f5f tools: acrntrace: output trace data as raw data
Benefits of outputing trace data as raw data:
  - Smaller trace data size
  - More convenient to add new trace entry. There is no need to change acrntrace
    when we add new trace entry to HV. All we need do is to update the analysis
    scripts to deal with this situation.

Trace data size(with 1 UOS):
~57M   -- with patch
~137M  -- without patch

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-06-29 13:05:27 +08:00
Kaige Fu bfe47a7a91 HV: trace: Add nr of data and cpuid to trace_entry
Later patch will refactor acrntrace to make trace data output as raw data(binary)
and introduce a new tool(acrntrace_format) to parse raw data to human-readable
file.

Adding nr of data and cpuid to trace_entry will make it easy for acrntrace_format
to parse data file and inditify which cpu this trace entry belong to.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-06-29 13:05:27 +08:00
Shuo Liu 1c605a4f50 build: Using id tool to get builder username
Some build environment might has no USER pre-defined. So use id tool to
get builder username instead of USER environemnt.

Also add a version cleanup for tools to keep them updated.

Signed-off-by: Shuo Liu <shuo.a.liu@intel.com>
Acked-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-06-29 11:55:03 +08:00
Junjie Mao 1b97c6ea92 HV: vpic: cleanup uses of boolean variables
This patch drops the duplicated definitions to ''true'' and ''false'' and
initializes boolean variables with boolean values instead of integers.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 11:42:28 +08:00