HV:treewide:Update return type for bit operations fls and clz
Change the return type of function fls and clz as uint16_t; When the input is zero, INVALID_BIT_INDEX is returned; Update temporary variable type and return value check of caller when it call fls or clz; When input value is zero, clz returns 32 directly. V1-->V2: INVALID_BIT_INDEX instead of INVALID_NUMBER; Add type conversion as needed; Add "U/UL" for constant value as needed; Codeing style fixing. V2-->V3: Use type conversion to remove side effect of the variable which stores fls/clz return value; fls return INVALID_BIT_INDEX directly when the input value is zero. V3-->v4: Clean up comments for fls. Note: For instruction "bsrl", destination register value is undefined when source register value is zero. Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@ -767,25 +767,26 @@ vlapic_process_eoi(struct vlapic *vlapic)
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{
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struct lapic_regs *lapic = vlapic->apic_page;
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struct lapic_reg *isrptr, *tmrptr;
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int i, bitpos, vector;
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int i, vector;
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uint16_t bitpos;
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isrptr = &lapic->isr[0];
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tmrptr = &lapic->tmr[0];
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for (i = 7; i >= 0; i--) {
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bitpos = fls(isrptr[i].val);
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if (bitpos >= 0) {
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if (bitpos != INVALID_BIT_INDEX) {
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if (vlapic->isrvec_stk_top <= 0) {
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panic("invalid vlapic isrvec_stk_top %d",
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vlapic->isrvec_stk_top);
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}
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isrptr[i].val &= ~(1 << bitpos);
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vector = i * 32 + bitpos;
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isrptr[i].val &= ~(1U << (uint32_t)bitpos);
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vector = i * 32 + (int32_t)bitpos;
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dev_dbg(ACRN_DBG_LAPIC, "EOI vector %d", vector);
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VLAPIC_CTR_ISR(vlapic, "vlapic_process_eoi");
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vlapic->isrvec_stk_top--;
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vlapic_update_ppr(vlapic);
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if ((tmrptr[i].val & (1 << bitpos)) != 0) {
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if ((tmrptr[i].val & (1U << (uint32_t)bitpos)) != 0U) {
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/* hook to vIOAPIC */
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vioapic_process_eoi(vlapic->vm, vector);
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}
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@ -1131,7 +1132,8 @@ int
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vlapic_pending_intr(struct vlapic *vlapic, uint32_t *vecptr)
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{
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struct lapic_regs *lapic = vlapic->apic_page;
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int i, bitpos;
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int i;
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uint16_t bitpos;
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uint32_t vector;
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uint32_t val;
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struct lapic_reg *irrptr;
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@ -1144,8 +1146,8 @@ vlapic_pending_intr(struct vlapic *vlapic, uint32_t *vecptr)
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for (i = 7; i >= 0; i--) {
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val = atomic_load((int *)&irrptr[i].val);
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bitpos = fls(val);
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if (bitpos >= 0) {
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vector = i * 32 + bitpos;
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if (bitpos != INVALID_BIT_INDEX) {
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vector = (uint32_t)(i * 32) + (uint32_t)bitpos;
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if (PRIO(vector) > PRIO(lapic->ppr)) {
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if (vecptr != NULL)
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*vecptr = vector;
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@ -31,6 +31,14 @@
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#define BITS_H
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#define BUS_LOCK "lock ; "
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/**
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*
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* INVALID_BIT_INDEX means when input paramter is zero,
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* bit operations function can't find bit set and return
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* the invalid bit index directly.
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*
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**/
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#define INVALID_BIT_INDEX 0xffffU
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/**
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*
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@ -38,28 +46,32 @@
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* return the bit index of that bit.
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*
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* Bits are numbered starting at 0,the least significant bit.
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* A return value of -1 means that the argument was zero.
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* A return value of INVALID_BIT_INDEX means return value is
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* invalid bit index when the input argument was zero.
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*
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* Examples:
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* fls (0x0) = -1
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* fls (0x0) = INVALID_BIT_INDEX
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* fls (0x01) = 0
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* fls (0xf0) = 7
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* fls (0x80) = 7
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* ...
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* fls (0x80000001) = 31
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*
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* @param value: 'unsigned int' type value
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* @param value: 'uint32_t' type value
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*
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* @return value: zero-based bit index, -1 means 'value' was zero.
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* @return value: zero-based bit index, INVALID_BIT_INDEX means
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* when 'value' was zero, bit operations function can't find bit
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* set and return the invalid bit index directly.
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*
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* **/
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static inline int fls(unsigned int value)
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static inline uint16_t fls(uint32_t value)
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{
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int ret;
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uint32_t ret = 0U;
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if (value == 0U)
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return (INVALID_BIT_INDEX);
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asm volatile("bsrl %1,%0"
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: "=r" (ret)
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: "rm" (value), "0" (-1));
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return ret;
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: "rm" (value));
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return (uint16_t)ret;
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}
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static inline int fls64(unsigned long value)
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@ -124,9 +136,13 @@ static inline int ffz64(unsigned long value)
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*
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* @return The number of leading zeros in 'value'.
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*/
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static inline int clz(unsigned int value)
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static inline uint16_t clz(uint32_t value)
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{
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return (31 - fls(value));
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if (value == 0U)
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return 32U;
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else{
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return (31U - fls(value));
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}
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}
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/**
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@ -16,7 +16,7 @@ static int do_udiv32(uint32_t dividend, uint32_t divisor,
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* are valid * clz(dividend)<=clz(divisor)
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*/
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mask = clz(divisor) - clz(dividend);
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mask = (uint32_t)(clz(divisor) - clz(dividend));
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/* align divisor and dividend */
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divisor <<= mask;
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mask = 1U << mask;
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@ -26,8 +26,8 @@ static int do_udiv32(uint32_t dividend, uint32_t divisor,
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dividend -= divisor;
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res->q.dwords.low |= mask;
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}
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divisor >>= 1;
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} while (((mask >>= 1) != 0) && (dividend != 0));
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divisor >>= 1U;
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} while (((mask >>= 1U) != 0U) && (dividend != 0U));
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/* dividend now contains the reminder */
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res->r.dwords.low = dividend;
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return 0;
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