ioapic reset function will be called when doing guest reset.
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
If the vcpu->guest_msrs was allocated, don't allocate the memory
again to avoid memory leak when init_msr_emulation is called
more than once.
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
vlapic reset should also zero apic_page and pir_desc if pir is
enabled.
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Due to cbc_lifecycle service already has its own retry mechanism,so change the
Restart type to "no".
This change is also indirectly avoid cbc_lifecycle always restart for the
non-IOC boards. Actually, there has one defect for current IOC CBC architecture
due to lack IOC hardware detection mechanism. The related guys are already aware
it and WIP.
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Reviewed-by: Alex Du <alek.du@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
To reduce type conversion in HV:
Update return type of function ffs64 and ffz64 as uint16;
For ffs64, when the input is zero, INVALID_BIT_INDEX is returned;
Update temporary variable type and return value check of caller
when it call ffs64 or ffz64;
Note: In the allocate_mem, there is no return value checking for
calling ffz64, this will be updated latter.
V1-->V2:
INVALID_BIT_INDEX instead of INVALID_NUMBER
Coding style fixing;
INVALID_CPU_ID instead of INVALID_PCPU_ID or INVALID_VCPU_ID;
"%hu" is used to print vcpu id (uint16_t);
Add "U/UL" for constant value as needed.
V2-->V3:
ffs64 return INVALID_BIT_INDEX directly when
the input value is zero;
Remove excess "%hu" updates.
V3-->V4:
Clean up the comments of ffs64;
Add "U" for constant value as needed.
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Change the return type of function fls64 and clz64 as uint16_t;
When the input is zero, INVALID_ID_INDEX is returned;
Update temporary variable type and return value check of caller
when it call fls64 or clz64;
When input value is zero, clz64 returns 64 directly.
V1-->V2:
INVALID_BIT_INDEX instead of INVALID_NUMBER;
Partly revert apicv_pending_intr udpates;
Add type conversion as needed;
Coding style fixing.
V2-->V3:
Correct type conversion;
fls64 return INVALID_BIT_INDEX directly when
the input value is zero.
V3-->V4:
No updates for this part in PATCH V4.
Note: For instruction "bsrq", destination register value
is undefined when source register value is zero.
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Change the return type of function fls and clz as uint16_t;
When the input is zero, INVALID_BIT_INDEX is returned;
Update temporary variable type and return value check of caller
when it call fls or clz;
When input value is zero, clz returns 32 directly.
V1-->V2:
INVALID_BIT_INDEX instead of INVALID_NUMBER;
Add type conversion as needed;
Add "U/UL" for constant value as needed;
Codeing style fixing.
V2-->V3:
Use type conversion to remove side effect of
the variable which stores fls/clz return value;
fls return INVALID_BIT_INDEX directly when the
input value is zero.
V3-->v4:
Clean up comments for fls.
Note: For instruction "bsrl", destination register value
is undefined when source register value is zero.
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Function prepare_vm0_memmap_and_e820 and init_vm0_boot_info are specific for vm0.
There is no need to check is_vm0 again in those functions.
This patch remove the unnecssary checks.
v1 -> v2:
- Add pre-condition comment before the function as Junjie's suggestion.
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
There are multiple helpers for collecting info to be printed on the ACRN uart
console. They are unreachable code in release builds in which the uart console
is removed.
To define a precise boundary for safety-related activities, this patch wraps the
declarations and definitions to these helpers with "#ifdef HV_DEBUG" so that
these unreachable APIs will be dropped in release builds.
v1 -> v2:
* Fix coding style: no empty lines between #ifdef and the wrapped code.
* Also drop get_rte_info() in ioapic.c, which is solely used by
get_ioapic_info().
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
With current code, the INIT-STARTUP IPI with EXCLUDING_SELF shorthand
cannot be handled.
This patch is to correct hypervisor to emulate IPI with different
delivery_mode & shorthand.
Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
- UOS will boot fail if 'strictio' is enabled ('-e' option), in this
case (with '-e'), device model will block all PIO accesses whose
handlers were not registered, after that, device model program will
exit, hence UOS boot fail.
actually, such kind of accesses exist, e.g. UOS would program
PIT registers (port address: 0x43) if hpet is disabled.
- For debug, we can trap unexpected PIO access in 'default_inout()'
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Similar to cr0/4:
- use context->vmx_ia32_pat to save/restore VMX_GUEST_IA32_PAT field
- use context->ia32_pat to keep track the guest' view of IA32_PAT MSR
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This patch makes use of IA32_PAT MSR to emulate cache disabled behaviour
When the guest is requesting to set CR0.CD:
- Keep guest's CR0.CD and CR0.NW bits unchanged
- Write IA32_PAT MSR with all-UC entries to change the effective memory
type for all GPA to UC for the guest VCPU
- It depends on trapping wrmsr to IA32_PAT to prevent any entry in
IA32_PAT being changed to non UC type by the guest
When the guest is requesting to clear CR0.CD:
- restore the content of guest's IA32_PAT MSR
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Preparing for emulating guest's CR0.CD and CR0.NW bits:
- Intercept both rdmsr and wrmsr for IA32_PAT
- Track guest's IA32_PAT MSR with vcpu.arch_vcpu.contexts.ia32_pat
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
enum cpu state is better than cpu state macro.
V1->V2:
move enum cpu_state under #ifndef ASSEMBLER MACRO to avoid
assembler compiler scan.
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
We define attr.name in struct vm and named as ("vm_%d", attr.id). attr.name only
be used in debug tool vm_list. It does't deserve to do so in OS created flow
(aka function create_vm). It's better to handle this in vm_list tool.
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@inte.com>
struct map_params's member page_table_type is enum _page_table_type,
transferred it.
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Add a new parameter csar to get_guest_paging_info. We will save one exec_vmread
in this case.
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
There are two prefix (aka TRC and TRACE) for trace event. This patch make all
the trace event prefix consist with TRACE.
No functional change.
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
operations
For reducing sign conversion in hypervisor:
Update parameters of bitmap operations as unsigned type;
Update the input of related caller as unsigned type when the
caller's input parameter is const variable or the variable is
only used by bitmap operations.
V1-->V2:
(1) Explicit casting for the first parameter
of all bitmap operations;
(2) Remove mask operation for explicit casting
of all bitmap operations, since masking is
useless. Otherwise, this trucation is dangerous.
V2-->V3:
(1) Explicit casting for all bitmap operations parameter;
(2) Masking bit offset with 6-bit;
(3) Add few comments about bit offset.
V3-->V4:
add '\' for some statement of bitmap macro
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Add a tutorial on how to change the default configuration that
uses DHCP and assign a static IP address to the system.
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Fix a minor rendering issue in the Getting Started Guide where a
code-block is not appearing as such.
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
This patch resolved systemd be blocking for 20 seconds due to waiting the
"READY=1" from cbc_attach. And cbc_attach will retry 60 sec at the worst case
which can be reproduced on non-IOC boards.
This is one temporary solution. The final solution need modify SBL to export IOC
ACPI device through ACPI table, and also Linux IOC CBC driver need trigger
uevent which should be the trigger of launching cbc_attach service.
This patch changes the service type to simple instead of notify due to systemd is
needn't wait cbc related services. And change Restart to no due to cbc_attach
already has retry mechanism.
These changes are also reasonable for the board integrated IOC component.
So they should be keep even the long term final solution implemented.
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Reviewed-by: Alex Du <alek.du@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
The struct member types should be transfer to non-basic types,
chaned it to length-prefix(uint32_t,int32_t ...) type.
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
- replace 'strtol()' with 'strtol_deci()'
-- supports string with decimal format
- replace 'strtoul()' with 'strtoul_hex()'
-- support string with hex format
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
In the original design, acrnprobe marked all handled VMs'events as "synced"
in file vmrecordid(this patch changes the name to VM_eventsID.log).
Currently, the Android log events are not logged if the first attempt at
reading collecting them from the VM fails. This patch changes the logic
so that the acrn-crashlog tool will retry continuously.
This patch defines different tags for handled VMs'events, and only marks
VMs'events "synced" after it returns successfully.
Signed-off-by: Liu, Xinwu <xinwu.liu@intel.com>
Reviewed-by: xiaojin2 <xiaojing.liu@intel.com>
Reviewed-by: Jin Zhi <zhi.jin@intel.com>
Acked-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Acked-by: Chen gang <gang.c.chen@intel.com>
Constants represented in an unsigned type should have the 'U' suffix per MISRA C
requirements even for 0 to get rid of implicit signedness conversions which can
be confusing due to the implementation-defined integer formats.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
With pins being uint8_t, implicit narrowing conversions arises since unsigned
integer constants, irq IDs and general registers have type ''unsigned
int''. Make such conversions explicit.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
PIC pin IDs should be logically unsigned, while we currently use ''int'' to
represent them.
Following the convention we use unsigned IDs, this patch converts the
representation of pins to uint8_t. A special value VPIC_INVALID_PIN is
introduced to represent the case when a valid target pin cannot be
found (previously -1 is used for this case). The branch conditions are updated
accordingly, following the convention below.
(for ''pin''s representing a per-PIC pin)
if (pin != -1) -> if (pin < NR_VPIC_PINS_PER_CHIP)
if (pin == -1) -> if (pin >= NR_VPIC_PINS_PER_CHIP)
if (pin >= 0 && pin < 8) -> if (pin < NR_VPIC_PINS_PER_CHIP)
if (pin >= 0 && pin <= 7) -> if (pin < NR_VPIC_PINS_PER_CHIP)
if (pin >= 0) -> if (pin < NR_VPIC_PINS_PER_CHIP)
(for ''pin''s representing a pin in the vPIC with 2 cascading PICs)
if (pin >= 0 && pin <= 15) -> if (pin < NR_VPIC_PINS_TOTAL)
if (pin > 15) -> if (pin >= NR_VPIC_PINS_TOTAL)
Related local variables are also changed accordingly.
v1 -> v2:
* Rename the number of pins per PIC to NR_VPIC_PINS_PER_CHIP, and the number
of pins of 2 cascading PICs to NR_VPIC_PINS_TOTAL.
* Using "%hhu" instead of "%d" in format string when a pin is expected.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
We've been expanding documentation, and now need to organize things a bit
cleaner and separate content into new major folders: Introduction, Getting
Started, User Guides, Developer Guides, Tutorials, and Release notes..
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
According intel mannual and ACPI mannual,lapic_id length is 1 byte.
V1->V2:
Add U suffix to the numeric when do arithmetic operation on lapic.
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
This analyzer is implemented in vmexit_analyze. This patch make it as independent
analyzer with an option "--irq"
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
- Refactor vmexit_analyzer based on new trace format (raw data). We can get
the same output like original implementation.
- Remove irq related analysis. Will add it back with an option "--irq".
- Remove unused VMEXIT_EPT_VIOLATION_GVT
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
As we may analyze multi-cases at the same time. It's better to store all the
analyzer in an array. Then we can traverse the array and exec all analyzer one
by one.
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Originally, acrntrace stores cpu frequency in output file and use it for time-based
analysis. Actually, we should use TSC frequency instead of cpu frequency.
This patch change to using TSC frequency for time-based analysis and introduce
an option "-f --frequency" to let user configure TSC frequency.
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
acrntrace_format.py is used for parsing raw trace data to human-readable file on
given format. A sample format file for acrntrace predefined trace events is available
in tools/acrntrace/scripts/formats in acrn source tree.
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Benefits of outputing trace data as raw data:
- Smaller trace data size
- More convenient to add new trace entry. There is no need to change acrntrace
when we add new trace entry to HV. All we need do is to update the analysis
scripts to deal with this situation.
Trace data size(with 1 UOS):
~57M -- with patch
~137M -- without patch
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Later patch will refactor acrntrace to make trace data output as raw data(binary)
and introduce a new tool(acrntrace_format) to parse raw data to human-readable
file.
Adding nr of data and cpuid to trace_entry will make it easy for acrntrace_format
to parse data file and inditify which cpu this trace entry belong to.
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Some build environment might has no USER pre-defined. So use id tool to
get builder username instead of USER environemnt.
Also add a version cleanup for tools to keep them updated.
Signed-off-by: Shuo Liu <shuo.a.liu@intel.com>
Acked-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
This patch drops the duplicated definitions to ''true'' and ''false'' and
initializes boolean variables with boolean values instead of integers.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Port I/O handlers are expected to accept unsigned port address and width which
have type uint16_t and size_t accordingly. The internal handlers in vpic, on the
other hand, declares signed addresses and width in their prototypes. This patch
enforces unsignedness of addresses and widths in these handlers.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
The number of initialization command word (ICW) and register contents are
logically unsigned and they have already been used in such way. This patch
changes the declaration of them so that the declarations, definitions and uses
are all aligned.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
WIFI dev has no FLR, so 'reset' in sysfs calls secondary bus reset,
which cause PCI configuration mess(all FF) then passthrough failure.
To fix it, this patch makes no reset before passthrough by default,
until append this option.
Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Use right parameter in launch_uos.sh after updating prefer_msi option
Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Current option of removing vGSI capability is global, which exposes
vIOAPIC link for all ptdev even only one need this. This patch makes
it as ptdev local option to lower the system level impact. To keep
vGSI for MSI capable ptdev, just explicitly append ",keep_gsi" in
option list, like "-s 14,passthru,0/e/0,keep_gsi"
Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Yin Fengwei