Commit Graph

3766 Commits

Author SHA1 Message Date
Minggui Cao 6fa41eee98 DM: add static for local variables
variables defined by struct logger_ops just used
in local file, so add static to them.

Tracked-On: #3012
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2019-06-13 13:06:51 +08:00
Xiaoguang Wu 5a9627ced8 DM USB: xHCI: refine the emulation of Stop Endpoint Command
Old implementation does nothing when Stop Endpoint cmd is received,
it is not right. The new implementation will cancel all the libusb
requests in processing.

Tracked-On: #3054
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-06-13 10:30:38 +08:00
Xiaoguang Wu 1be719c630 DM USB: clean-up: change name of function usb_dev_comp_req
Change it to usb_dev_comp_cb, which is more accurate for what
it does. This patch doesn't change original program logic.

Tracked-On: #3054
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-06-13 10:30:38 +08:00
Xiaoguang Wu 7dbde27615 DM USB: xHCI: use new isoch transfer implementation
The old implementation processes isoch TRB one by one, this method
can't support scenario which needs high performance, such as real
time USB camera video.

New implementions will compose all the isoch TRBs for one Door Bell
Ring, and give them to libusb as a single request. The test result
shows that this method could greatly improve the porfermance.

Tracked-On: #3054
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-06-13 10:30:38 +08:00
Xiaoguang Wu b57f6f9243 DM USB: clean-up: give shorter names to libusb_xfer and req
The names for the two variables are too long, change to shorter
name. This patch doesn't change any logic, just clean up.

Tracked-On: #3054
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-06-13 10:30:38 +08:00
Xiaoguang Wu adaed5c0e3 DM USB: xHCI: add 'chained' field in struct usb_data_xfer_block
The chained field could help to describe the relationship of USB
data blocks.

Tracked-On: #3054
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-06-13 10:30:38 +08:00
Xiaoguang Wu f2e35ab701 DM USB: save MaxPacketSize value in endpoint descriptor
Save the MaxPacketSize value for every endpoint of virtual
USB device.

Tracked-On: #3054
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-06-13 10:30:38 +08:00
Zhao Yakui 296b649ae9 ACRN/HV: emulated pcicfg uses the aligned offset to fix the unaligned pci_cfg access
When the SOS kernel/pre-launched OS access the 0xCF8/0xCFC, it will cause
the vm-exit and then the hypervisor tries to emulate the PCI_cfg access.
0xCF8 write:  The bdf/reg is captured. cache_reg = value & (0xFF);
0xCFC-0xCFF read/write: offset = address - 0xCFC. Then cached_reg + offset is
used as the offset to access the pci_cfg.

If the aligned reg is passed in 0xCF8 register, it can work well. But when
the unaligned reg is passed in 0xCF8 register, the cached_reg + offset will cause
that the incorrect pci_cfg offset is accessed. For example:
   The cached_reg = 0x02(Device_ID offset) based on the value passed from 0xCF8
   offset = 2 based on 0xCFC-0xCFF address.
   Then cached_reg + offset is used as the offset(PCI_CMD_REG)

In fact the unaligned reg can work well on the real HW.

So the cached_reg should be aligned to handle the unaligned reg passed in
0xCF8 reg.

Tracked-On: #3249
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2019-06-13 10:28:17 +08:00
Arindam Roy 2321fcdf78 HV:Modularize vpic code to remove usage of acrn_vm
V1:Initial Patch
Modularize vpic. The current patch reduces the usage
of acrn_vm inside the vpic.c file.
Due to the global natire of register_pio_handler, where
acrn_vm is being passed, some usage remains.
These needs to be a separate "interface" file.
That will come in smaller newer patch provided
this patch is accepted.

V2:
Incorporated comments from Jason.

V3:
Fixed some MISRA-C Violations.

Tracked-On: #1842
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
Reviewed-by: Xu, Anthony <anthony.xu@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-06-13 09:54:52 +08:00
David B. Kinder c91a54882f doc: improve clarity of build-from-source intro
Rather than have the developer make edits, it was easier to merge
PR #3246 and submit a new PR with improvements.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-06-12 12:24:44 -07:00
Yan, Like 32239cf55f hv: reduce cyclomatic complexity of create_vm()
This commit extract pm io handler registration code to register_pm_io_handler()
to reduce the cyclomatic complexity of create_vm() in order to be complied with
MISRA-C rules.

Tracked-On: #3227
Signed-off-by: Yan, Like <like.yan@intel.com>
2019-06-12 14:29:50 +08:00
Yan, Like 771f15cd6b dm: don't present ioapic and pic to RT VM
Per ACRN RT VM design, there is no virtual IOAPIC and virtual PIC emulated for RT VM.
This commit removes the entries of IOAPIC, PIC, PPRT and APRT in ACPI table for RT VM.

Tracked-On: #3227
Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-06-12 14:29:50 +08:00
Conghui Chen ac6c5dce81 HV: Clean vpic and vioapic logic when lapic is pt
When the lapic is passthru, vpic and vioapic cannot be used anymore. In
current code, user can still inject vpic interrupt to Guest OS, this is
not allowed.
This patch remove the vpic and vioapic initiate functions during
creating VM with lapic passthru. But the APIs in vpic and vioapic are
called in many places, for these APIs, follow the below principles:

1. For the APIs which will access uninitiated variables, and may case
hypervisor hang, add @pre to make sure user should call them after vpic or
vioapic is initiated.

2. For the APIs which only return some static value, do noting with them.

3. For the APIs which user will called to inject interrupt, such as
vioapic_set_irqline_lock or vpic_set_irqline, add condition in these
APIs to make sure it only inject interrupt when vpic or vioapic is
initiated. This change is to make sure the vuart or hypercall need not
to care whether lapic is passthru or the vpic and vioapic is initiated
or not.

Tracked-On: #3227
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
2019-06-12 14:29:50 +08:00
Victor Sun f83ddd393f HV: introduce relative vm id for hcall api
On SDC scenario, SOS VM id is fixed to 0 so some hypercalls from guest
are using hardcoded "0" to represent SOS VM, this would bring issues
for HYBRID scenario which SOS VM id is non-zero.

Now introducing a new VM id concept for DM/VHM hypercall APIs, that
return a relative VM id which is from SOS view when create VM for post-
launched VMs. DM/VHM could always treat their own vm id is "0". When they
make hypercalls, hypervisor will convert the VM id to the absolute id
when dispatch the hypercalls.

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2019-06-12 11:00:40 +08:00
Victor Sun 3d3de6bd38 HV: specify dispatch hypercall for sos or trusty
Changes:

- In current design, the hypercall is only allowed calling from SOS or
trusty VM, so separate the trusty hypercalls from dispatch_hypercall().
The vm parameter which referenced by hcall_xxx() should be SOS VM;

- do not inject #UD for hypercalls from non-SOS, just return -ENODEV;

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2019-06-12 11:00:40 +08:00
Shiqing Gao 8c70871ff1 doc: add an introduction for building hypervisor
- add an introduction part for building ACRN hypervisor
- clarify why ACRN hypervisor does not support one binary
  for all platforms

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2019-06-11 17:30:40 -07:00
Yin Fengwei 6b7233446f xsave: inject GP when guest tries to write 1 to XCR0 reserved bit
According to SDM vol1 13.3:
Write 1 to reserved bit of XCR0 will trigger GP.

This patch make ACRN behavior align with SDM definition.

Tracked-On: #3239
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-06-12 08:28:53 +08:00
T d145ac65a3 doc: fix typo in the "Build ACRN from Source" guide
Fixes a small typo. See also https://github.com/projectacrn/projectacrn.github.io/pull/18

Signed-off-by: shrmrf <shrmrf@users.noreply.github.com>
2019-06-11 09:18:19 -07:00
Tianhua Sun 8dd471b37d hv: fix possible null pointer dereference
This patch fix potential null pointer dereference

1, will access null pointer if 'context' is null.
2, if entry already been added to the VM when add
   intx entry for this vm, but parameter virt_pin
   is not equal to entry->virt_sid.intx_id.pin. So
   will saves this entry address to
   vpin_to_pt_entry[entry->virt_sid.intx_id.pin] and
   vpin_to_pt_entry[virt_pin]. In this case, this entry
   will be freed twice.

Tracked-On: #3217
Signed-off-by: Tianhua Sun <tianhuax.s.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-06-11 16:03:04 +08:00
bing.li 509af78490 dm: Solve the problem of repeat mount hugetblfs
If you run two acrn-dm processes at the same time,
hugetblfs will be mounted twice, which will cause a memory leak.
The specific solution is :different virtual machines mount hugetblfs
into different directories.

Tracked-On:#2854
Signed-off-by: bing.li <bingx.li@intel.com>
Reviewed-by: Minggui Cao<minggui.cao@intel.com>
Acked-by: Yin Fengwei<fengwei.yin@intel.com>
2019-06-11 15:03:47 +08:00
Victor Sun e5a25749e5 doc: add multiboot module string parameter
The multiboot module string will be used to identify the usage of current
module, it must exactly match with "kernel_mod_tag" which configured in
VM configurations files;

Signed-off-by: Victor Sun <victor.sun@intel.com>
2019-06-10 16:30:25 -07:00
Zide Chen e63d32ac02 hv: delay enabling SMEP/SMAP until the end of PCPU initialization
Host ACPI parsing is needed during initialization only, not in run time.
Hence we don't need to clear U flag for memory in reserved or ACPI type
E820 entries.

- move enable_smep() and enable_smap() to the end of init_pcpu_post(),
  so stac()/clac() can be removed from any init code before this point.

- call init_seed() before init_pcpu_post(), and rmeove stac()/clac() from
  init_seed().

Tracked-On: #3194
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-06-10 11:35:15 +08:00
Zide Chen 9e91f14bec hv: correctly grant DRHD register access rights to hypervisor
Need to call hv_access_memory_region_update() explicitly for DRHD
registers to correctly grant access rights for hypervisor.

Currently, other hv_access_memory_region_update() calls happen to
cover the DRHD addresses for currently supported platforms.

Tracked-On: #3194
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-06-10 11:35:15 +08:00
Zhao Yakui c71cf753eb ACRN/HV: Add one new board configuration for ACRN-hypervisor
The memory size and IOMMU number are refined to meet with ICL board requirement.
Otherwise the ACRN hypervisor can't be booted on the new ICL board.
ICL(the abbreviation of Ice Lake) is the next generation platform based on 10nm.
CPU is based on Sunny Cove microarchitecture and GPU is based on gen11.
The new board is named as icl-rvp.

Tracked-On: #3216
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
2019-06-10 11:23:18 +08:00
Li, Wilson 115ba0e390 Added recommended BIOS settings for better real-time performance.
Signed-off-by: Li, Wilson <wilson.li@intel.com>
2019-06-08 05:57:23 -07:00
Geoffroy Van Cutsem 7c45f3b588 doc: remove 'reboot' command from ACRN shell user guide
The 'reboot' command from the ACRN shell has been removed. Remove the
corresponding documentation from the ACRN Shell user guide.

Tracked-On: #3210
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2019-06-07 13:19:05 -07:00
Victor Sun 04d82e5c0f HV: return virtual lapic id in vcpuid 0b leaf
Currently vlapic id of SOS VM is virtualized, it is indexed by vcpuid in
physical APIC id sequence, but CPUID 0BH leaf still report physical
APIC ID. In SDC/INDUSTRY scenario they are identical mapping so no issue
occured. In hybrid mode this would be a problem because vAPIC ID might
be different with pAPIC ID. We need to make the APIC ID which returned from
CPUID consistent with the one returned from LAPIC register.

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-06-06 15:22:10 +08:00
Victor Sun 0a748fedac HV: add hybrid scenario
Hybrid scenario will run 3 VMs: one pre-launched VM, one pre-launched SOS VM
and one post-launched Standard VM.

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-06-06 15:22:10 +08:00
Jason Chen CJ a2c6b11614 HV: change nuc7i7bnh ram start to 0x60000000
to support grub multiboot for nuc7i7bnh, we should put hv ram start
at a suitable address as SOS bzImage may need use 0x1000000

Tracked-On: #3214

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
2019-06-06 15:22:10 +08:00
Victor Sun 31aa37d349 HV: remove unused INVALID_VM_ID
The VM IDs which is high or equal then CONFIG_MAX_VM_NUM are all
invalid VM IDs, the MACRO has never been referenced in code, so
remove it;

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-06-06 15:22:10 +08:00
Victor Sun 50e09c41b4 HV: remove cpu_num from vm configurations
The vcpu num could be calculated based on pcpu_bitmap when prepare_vcpu()
is done, so remove this redundant configuration item;

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-06-06 15:22:10 +08:00
Victor Sun f4e976ab38 HV: return -1 with invalid vcpuid in pt icr access
vm_apicid2vcpu_id() might return invalid vcpu id, when this happens
we should return -1 in vlapic_x2apic_pt_icr_access();

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-06-06 15:22:10 +08:00
Victor Sun ae7dcf443d HV: fix wrong log when vlapic process init sipi
The print message of source and target vcpu id is incorrect, fix it.

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-06-06 15:22:10 +08:00
Conghui Chen 765669ee35 dm: support VMs communication with virtio-console
Adding the feature of communication between VMs using virtio-console
based on appointed socket file. Not appointing the socket type will set
the socket type to be server in default.

Example:
Server: adding "-s 5,virtio-console,socket:console=/path/console.sock:server"
Client: adding "-s 6,virtio-console,socket:console=/path/console.sock:client"

Tracked-On: #3232
Signed-off-by: Gao Junhao <junhao.gao@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-06-06 12:40:47 +08:00
Conghui Chen c0bffc2f58 dm: virtio: refine console options parse code
Refine the virtio-console options parse code, so that no need to pass
all the variables as parameters to the backend adding function.

Tracked-On: #3232
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-06-06 12:40:47 +08:00
Peter Fang ce6e663f6c OVMF release v1.1
- Cleanup unused and unsupported function of AcrnRtc
- Remove SMBIOS support
- Add ResetSystemLib for ACRN
- Disable BhyveFwCtlLib
- Disable COM2
- Avoid connecting all system drivers
- Speed up Ps2KeyboardDxe
- Created new Rtc driver and optimized RtcInit and RtcGetTime
- Initialize EmuVariable NV storage memory with varstore from ROM
- Switch to BasePciLibPciExpress
- Avoid exhaustive PCI bus scanning during PCI host bridge
  initialization
- Add support for ACRN platform initialization
- Add ACRN's Host Bridge Device ID

Tracked-On: #3226
Signed-off-by: Peter Fang <peter.fang@intel.com>
2019-06-06 12:11:59 +08:00
Victor Sun 0baf537a2c HV: misra fix for patch set of Zephyr enabling
- add @pre condition remark;
- fix of NULL pointer check;

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
2019-06-06 09:40:52 +08:00
Victor Sun 1906def29e HV: enable load zephyr kernel
Zephyr kernel is stripped ram image, its entry and load address
are explicitly defined in vm configurations, hypervisor will load
Zephyr directly based on these configurations.

Currently we only support boot Zephyr from protected mode.

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-06-06 09:40:52 +08:00
Victor Sun 6940cabd22 HV: modify ve820 to enable low mem at 0x100000
Some OS like Zephyr need to run at 0x100000, so modify the ve820 table
accordingly;

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-06-06 09:40:52 +08:00
Victor Sun ea7ca8595c HV: use tag to specify multiboot module
Previously multiboot mods[0] is designed for kernel module for all
pre-launched VMs including SOS VM, and mods[0].mm_string is used
to store kernel cmdline. This design could not satisfy the requirement
of hybrid mode scenarios that each VM might use their own kernel image
also ramdisk image. To resolve this problem, we will use a tag in
mods mm_string field to specify the module type. If the tag could
be matched with os_config of VM configurations, the corresponding
module would be loaded;

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-06-06 09:40:52 +08:00
Victor Sun d0fa83b2cb HV: move sos bootargs to vm configurations
Previously the bootargs of SOS_VM is stored in a text file and stitched
into multiboot mods[0].string whereas the bootargs of PRE_LAUNCHED_VM is
stored in vm_configurations.c. Given the mods[].string will be used to
store Kernel image signature under hybrid mode, move the bootargs of SOS_VM
to vm configurations also to make it consistent with PRE_LAUNCHED_VM;

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-06-06 09:40:52 +08:00
Victor Sun 8256ba2015 HV: add board specific config header
Use a misc_cfg.h in each board configs folder so that VM configurations
could include board specific MACROs;

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
2019-06-06 09:40:52 +08:00
Victor Sun bb55489e5c HV: make vm kernel type configurable
Different kernel has different load method, it should be configurable
in vm configurations;

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-06-06 09:40:52 +08:00
Victor Sun ae8893cba1 HV: use api to get kernel load addr
For a Linux guest, the kernel load address should be gotten from zeropage
even for a pre-launched VM;

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-06-06 09:40:52 +08:00
Victor Sun 1c00611382 HV: separate linux loader from direct boot sw loader
Currently the algorithm of direct_boot_sw_loader() is Linux bzImage specific,
so separate the bzImage specific loader code from it to make the api more
generic for other OS;

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-06-06 09:40:52 +08:00
Victor Sun 0f00a4b0da HV: refine sw_linux struct
The guest OS of ACRN will not be limited to Linux, so refine the struct
of sw_linux to more generic sw_module_info. Currently bootargs and ramdisk
are only supported modules but we can include more modules in future;

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-06-06 09:40:52 +08:00
David B. Kinder 475b05da54 doc: fix formatting in partition doc
Fix formatting missed during regular review.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-06-03 09:28:16 -07:00
Lei Lu 76346fd2b1 doc: setup logical partition scenario on nuc
This patch adds tutorial about how to setup logical partition scenario
on nuc

Signed-off-by: Lei Lu <leix.lu@intel.com>
2019-06-03 09:23:56 -07:00
ruix.li 6f61aa7d41 doc: add instruction of Open vSwitch
Add instruction to show user how to enable Open vSwitch on ACRN.

Tracked-On: #3132
Signed-off-by: ruix.li <ruix.li@intel.com>
2019-06-03 09:03:06 -07:00
Shiqing Gao a6bba6bc3d doc: update prefix format in coding guidelines
- update prefix format in coding guidelines

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2019-06-03 09:01:50 -07:00