zephyr/arch/riscv
Nicolas Pitre 530b593275 arch: riscv: apply CONFIG_RISCV_MCAUSE_EXCEPTION_MASK to FPU code
Some implementations use bits outside of the mcause mask for other
purpose.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2024-05-14 09:32:39 +02:00
..
core arch: riscv: apply CONFIG_RISCV_MCAUSE_EXCEPTION_MASK to FPU code 2024-05-14 09:32:39 +02:00
include arch: riscv: print callee-saved-registers in fatal error 2024-04-24 15:57:40 -04:00
CMakeLists.txt
Kconfig arch: riscv: implement frame-pointer based stack unwinding 2024-04-20 13:54:43 -04:00
Kconfig.isa