121 lines
2.4 KiB
Plaintext
121 lines
2.4 KiB
Plaintext
/*
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* Copyright (c) 2024 Analog Devices, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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#include <adi/max32/max32xxx.dtsi>
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#include <zephyr/dt-bindings/dma/max32662_dma.h>
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&flash0 {
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reg = <0x10000000 DT_SIZE_K(256)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(16)>;
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};
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/delete-node/ &clk_iso;
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/delete-node/ &gpio1;
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/delete-node/ &uart2;
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/delete-node/ &timer3;
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&adc {
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compatible = "adi,max32-adc-sar", "adi,max32-adc";
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clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
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clock-divider = <16>;
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channel-count = <19>;
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track-count = <4>;
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idle-count = <0>;
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vref-mv = <1250>;
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resolution = <12>;
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};
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/* MAX32662 extra peripherals. */
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/ {
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soc {
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sram1: memory@20004000 {
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compatible = "mmio-sram";
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reg = <0x20004000 DT_SIZE_K(16)>;
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};
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sram2: memory@20008000 {
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compatible = "mmio-sram";
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reg = <0x20008000 DT_SIZE_K(16)>;
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};
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sram3: memory@2000c000 {
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compatible = "mmio-sram";
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reg = <0x2000c000 DT_SIZE_K(16)>;
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};
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sram4: memory@20010000 {
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compatible = "mmio-sram";
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reg = <0x20010000 DT_SIZE_K(4)>;
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};
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sram5: memory@20011000 {
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compatible = "mmio-sram";
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reg = <0x20011000 DT_SIZE_K(4)>;
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};
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sram6: memory@20012000 {
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compatible = "mmio-sram";
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reg = <0x20012000 DT_SIZE_K(4)>;
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};
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sram7: memory@20013000 {
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compatible = "mmio-sram";
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reg = <0x20013000 DT_SIZE_K(4)>;
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};
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dma0: dma@40028000 {
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compatible = "adi,max32-dma";
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reg = <0x40028000 0x1000>;
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clocks = <&gcr ADI_MAX32_CLOCK_BUS0 5>;
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interrupts = <28 0>, <29 0>, <30 0>, <31 0>;
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dma-channels = <4>;
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status = "disabled";
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#dma-cells = <2>;
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};
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spi0: spi@40046000 {
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compatible = "adi,max32-spi";
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reg = <0x40046000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&gcr ADI_MAX32_CLOCK_BUS0 6>;
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interrupts = <16 0>;
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status = "disabled";
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};
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spi1: spi@40047000 {
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compatible = "adi,max32-spi";
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reg = <0x40047000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&gcr ADI_MAX32_CLOCK_BUS0 7>;
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interrupts = <17 0>;
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status = "disabled";
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};
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lptimer0: timer@40113000 {
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compatible = "adi,max32-timer";
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reg = <0x40113000 0x2000>;
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interrupts = <8 0>;
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status = "disabled";
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clocks = <&gcr ADI_MAX32_CLOCK_BUS2 0>;
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clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
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prescaler = <1>;
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counter {
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compatible = "adi,max32-counter";
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status = "disabled";
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};
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};
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};
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};
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