Francois Ramu 5c529919ec dts: arm: st: stm32h7 with dual core have flash clock enable bit ... Define the "clocks" property, for the flash "st,stm32h7-flash-controller" node, only for the stm32H7 dual-core devices which have the RCC bit 8 present in their RCC AHB3 register. Signed-off-by: Francois Ramu <francois.ramu@st.com>		2024-11-04 13:41:46 -06:00
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arc/synopsys	drivers: spi: dw: define max-xfer-size	2024-01-20 13:11:42 +01:00
arm	dts: arm: st: stm32h7 with dual core have flash clock enable bit	2024-11-04 13:41:46 -06:00
arm64	soc: imx93: enable flexcan driver	2024-09-17 17:44:14 +01:00
bindings	dts: bindings: power: add nordic,nrf-global-pd	2024-11-01 12:10:12 -05:00
common	dts: nordic: nrf54h20: add power domain information	2024-11-01 12:10:12 -05:00
nios2/intel	dts: nios2: intel: Fix unit and first address mismatch	2024-09-18 15:30:24 +02:00
posix	…
riscv	dts/andes: adjust the sizes of PLIC nodes	2024-10-31 14:17:02 -05:00
sparc/gaisler	soc/gr716a: Enable GPIO support on LEON GR716A	2024-07-29 14:27:15 +02:00
x86/intel	dts: x86: intel: ish: Remove d0i1 and modify d0i2	2024-07-04 13:26:24 +02:00
xtensa	pm: s/power-domain/power-domains and add power-domain-names	2024-10-18 17:45:21 +01:00
Kconfig	…
binding-template.yaml	…