506f15c381
We now place the linker directives for the SW ISR table in the common linker scripts, instead of repeating it everywhere. The table will be placed in RAM if dynamic interrupts are enabled. A dedicated section is used, as this data must not move in between build phases. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com> |
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| .. | ||
| common | ||
| pulpino | ||
| riscv-privilege | ||
| arch.h | ||
| exp.h | ||
| sys_io.h | ||