41 lines
823 B
C
41 lines
823 B
C
/*
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* Copyright (c) 2016 Linaro Limited.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_ARM_CLOCK_CONTROL_H_
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#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_ARM_CLOCK_CONTROL_H_
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#include <drivers/clock_control.h>
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/**
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* @file
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*
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* @brief Clock subsystem IDs for ARM family SoCs
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*/
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/* CMSDK BUS Mapping */
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enum arm_bus_type_t {
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CMSDK_AHB = 0,
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CMSDK_APB,
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};
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/* CPU States */
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enum arm_soc_state_t {
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SOC_ACTIVE = 0,
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SOC_SLEEP,
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SOC_DEEPSLEEP,
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};
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struct arm_clock_control_t {
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/* ARM family SoCs supported Bus types */
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enum arm_bus_type_t bus;
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/* Clock can be configured for 3 states: Active, Sleep, Deep Sleep */
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enum arm_soc_state_t state;
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/* Identifies the device on the bus */
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u32_t device;
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};
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#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_ARM_CLOCK_CONTROL_H_ */
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