Andy Ross 05c8e05634 soc/arm: Remove 1 kHz tick rate default for mcimx7_m4 and msp432p401r ... As with the STM32 boards, these had an existing default for tick rate that is now lower than the 10 kHz default. They're SysTick devices that can handle the higher rate just fine. Use that. Signed-off-by: Andy Ross <andrew.j.ross@intel.com>		2019-07-02 22:52:29 -04:00
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mcimx6x_m4	soc: arm: move z_clearfaults() in kernel_arch_init()	2019-05-17 09:48:11 -07:00
mcimx7_m4	soc/arm: Remove 1 kHz tick rate default for mcimx7_m4 and msp432p401r	2019-07-02 22:52:29 -04:00
rt	soc: nxp: rt: Enable mcux gpt when counter is enabled	2019-07-01 11:53:07 -05:00
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