As with the STM32 boards, these had an existing default for tick rate
that is now lower than the 10 kHz default. They're SysTick devices
that can handle the higher rate just fine. Use that.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
move misc/util.h to sys/util.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change code from using now deprecated DT_<COMPAT>_<INSTANCE>_<PROP>
defines to using DT_INST_<INSTANCE>_<COMPAT>_<PROP>.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Unlike Cortex-M3 and Cortex-M4, in Cortex-M7 the number of
MPU regions may vary based on the implementation. This commit
adds a DTS node for the ARM MPU peripheral in the device tree
of Cortex-M7 SoCs and updates the fixup files, so we may extract
the number of MPU regions at build time. SoCs:
- nxp_rt
- same70
- stm32f7
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
In kernel_arch_init() we initialize the ARM core (interrupt
setup, fault init, etc.) so we can also move z_clearfaults()
in the same function and skip invoking it in the SoC init
functions.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add support for NXP MCUX LPUART devices with separate IRQ lines for
transmit and receive status interrupts (e.g. the Kinetis KE1xF SoC
series).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
add usbd1 definition to rt dts file,
set EHCI controller config default value in rt1050 default config file,
add EHCI controller driver MACROs to dts_fixup.h,
initialize EHCI clock in rt soc.c
add HAS_MCUX_USB_EHCI for supported soc in Kconfig.soc
Signed-off-by: Mark Wang <yichang.wang@nxp.com>
ARM SysTick timer is implemented by default in ARMv7-M
and Mainline ARMv8-M processors, so we include the
corresponding Kconfig symbol in arch/arm/core/cortex-M/Kconfig
and remove the selections from the Cortex-M SOCs.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
CPU_CORTEX_M does not need to be selected by Kconfig
symbols that already select a CORTEX_M variant.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Same deal as in commit 4638652214 ("Kconfig: Use 'default' instead of
'def_bool' in Kconfig.defconfig files"), fixing new stuff that got
introduced since then.
Some symbols, like ALTERA_AVALON_PIO, are only defined in
Kconfig.defconfig files, and so need the def_bool.
Motivation (from the note at the end of
guides/kconfig/index.html#common-shorthands):
For a symbol defined in multiple locations (e.g., in a Kconfig.defconfig
file in Zephyr), it is best to only give the symbol type for the "base"
definition of the symbol, and to use 'default' (instead of 'def_<type>'
value) for the remaining definitions. That way, if the base definition
of the symbol is removed, the symbol ends up without a type, which
generates a warning that points to the other definitions. That makes the
extra definitions easier to discover and remove.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Not all i.mx rt socs have the same number of irqs, so move the default
configuration from the soc series level to the individual socs. The
rt1020 hardware reference manual (IMXRT1020RM Rev.1 12/2018) incorrectly
documents 160 irqs (#142-159 reserved), but the soc actually has 142
irqs.
Fixes tests/kernel/gen_isr_table for the mimxrt1020_evk board.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The iMX RT1060 and RT1064 have additional dedicated 512KB on-chip ram.
This OCRAM2 is mapped at 0x20200000, formerly OCRAM1 (flexram) mapping
which is moved to 0x20280000 in order to guarentee global OCRAM memory
continuity regardless OCRAM1 size configuration (256KB by default).
In default configuration, this gives 768KB (512+256) on-chip ram:
0x20200000 to 0x202BFFFF.
OCRAM2: 0x20200000 - 0x2027FFFF
OCRAM1(FlexRam): 0x2028FFFF - 0x202BFFFF
Add this memory region as a single node in the rt1060 device tree.
Note: MPU expects power of two memory region, in case of 768KB, let
the MPU configure 1MB instead.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
The i.MX RT1064 evk has one ethernet (10/100M) connector via KSZ8081RNB
phy. Enable related dts nodes and config flags
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
iMXRT1064 has 4MB on-chip Flash memory (flexspi2) mapped to 0x70000000.
Add it as configurable code location for MIMXRT1064-EVK board.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
We should be selecting CPU_HAS_ARM_MPU at this level and not
CPU_HAS_MPU. Change the cases of CPU_HAS_MPU to CPU_HAS_ARM_MPU.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit removes "select SYS_POWER_*_SUPPORTED" entries from
Kconfig on SoCs which are not implementing sys_set_power_state()
method used to control power mode.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Refactor the imx rt code/data location config defaults such that we
default to on-chip memories at the soc level and override to external
memories at the board level. This means that we frequently override soc
defaults for evk boards, but it removes the assumption that all imx rt
boards (particularly non-evk boards) will have the same external
memories as evk boards.
The end result is that imx rt evk boards still have the same defaults as
before, but the way we get there is different.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The imx rt dts fixup was missing gpio 2,3,4 instances. This caused a
build error in the gpio driver when an application enabled:
CONFIG_GPIO_MCUX_IGPIO_2=y
CONFIG_GPIO_MCUX_IGPIO_3=y
CONFIG_GPIO_MCUX_IGPIO_4=y
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The imx rt family of socs has several options for linking code and data
into internal or external memories, and up until now we have handled
these options at the board level. This has resulted in several Kconfig
symbols being defined in multiple places and triggering warnings in
documentation builds:
warning: the default selection CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) of <choice> (defined at boards/arm/mimxrt1050_evk/Kconfig:9) is not contained in the choice
warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice
warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice
warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice
warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice
warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice
warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice
The number of warnings increased as we added more imx rt boards. Fix the
warnings by moving code and data location configs from the board level
to the soc level.
The default memories for all imx rt boards are unchanged. The
mimxrt10{20,50,60}_evk boards still default to hyperflash/qspi for code
and sdram for data. The mimxrt1064_evk board still defaults to ITCM for
code and DTCM for data because jlink does not yet support programming
internal flash.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The SYS_POWER_LOW_POWER_STATE_SUPPORTED and SYS_POWER_LOW_POWER_STATE
suggests one low power state but these options control multiple
low power state. This commit uses plural in the names to indicate
that.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The soc nxp_imx RDC code has been using non DT_ prefixed defines for DT
generated defines. Switch to use DT_ prefixed ones as we want to
deprecated the non DT_ prefixed defines.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Select CPU_HAS_FPU_DOUBLE_PRECISION in SAM E70 and NXP I.MX RT
series of MCUs to signify double-precision floating-point unit.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add EPIT (Enhanced Periodic Interrupt Timer) peripheral support
for i.MX6SoloX soc.
Origin: Original
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Enables the mcux elcdif shim driver and clocks on imx rt socs when the
display driver interface is enabled.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new config HAS_MCUX_ENET to constrain which socs can enable the
mcux ethernet driver. This will prevent users from enabling the driver
on socs like kl25z or kw41z which do not have ethernet mac hardware.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enables the mcux ethernet driver and pin muxes on the mimxrt1020_evk
board, the same way it is done on the mimxrt1050_evk board. Updates the
board documentation and yaml supported list accordingly.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The ENET PLL should be enabled if the SoC is the MIMXRT1021 (it used by
the ARM core) or if the ENET device is enabled.
The 500MHz clock should be enabled if the SoC is the MIMXRT1021.
The ENET clock should be enabled if the ENET device is enabled.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Kconfig currently emits a warning when building for a MIMXRT1021 SoC:
warning: INIT_ENET_PLL (defined at
soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1052:66) has direct
dependencies NET_L2_ETHERNET && SOC_MIMXRT1052 && SOC_SERIES_IMX_RT
with value n, but is currently being y-selected by the following
symbols:
- SOC_MIMXRT1021 (defined at soc/arm/nxp_imx/rt/Kconfig.soc:12),
with value y, direct dependencies <choice> (value: y), and select
condition <choice> (value: y)
This is due to the fact the ENET PLL is the one used by the ARM core on
the MIMXRT1021 so it is always enabled, while it is declared protected
by NET_L2_ETHERNET and SOC_SERIES_IMX_RT.
Fix that by declaring the symbol in Kconfig.defconfig.series.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Enables the mcux lpi2c shim driver and clocks on all imx rt socs when
the i2c driver interface is enabled.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds dts fixups for lpuart instance 2, which will be used for the
arduino_serial connection on the mimxrt1020_evk board.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add support for the TRNG device contained in the i.MX RT SoCs. It uses
the existing MCUX driver, and mostly consists in adding the Kconfig and
DTS entries.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Adds support for the device configuration data (DCD), which provides a
sequence of commands to the imx rt boot ROM to initialize components
such as an SDRAM.
It is now possible to use the external SDRAM instead of the internal
DTCM on the mimxrt1020_evk, mimxrt1050_evk, and mimxrt1060_evk. Note,
however, that the default board configurations still link data into
internal DTCM, therefore you must use a device tree overlay to override
"zephyr,sram = &sdram0"
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Moves the default TEXT_SECTION_OFFSET from the board level to the soc
level for the imx rt series. This offset is used to reserve space for
the imx boot header for external xip flash images.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds support for the boot data, image vector table, and FlexSPI NOR
config structures used by the imx rt boot ROM to boot an application
from an external xip flash device.
It is now possible to build and flash a bootable zephyr image to the
external xip flash on the mimxrt1020_evk, mimxrt1050_evk, and
mimxrt1060_evk boards via the 'ninja flash' build target and jlink
runner. Note, however, that the default board configurations still link
code into internal ITCM, therefore you must set CONFIG_CODE_HYPERFLASH=y
or CONFIG_CODE_QSPI=y explicitly to override the default. You must also
set CONFIG_NXP_IMX_RT_BOOT_HEADER=y to build the boot header into the
image.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Andy Ross